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@@ -18,6 +18,9 @@
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/include/ "skeleton.dtsi"
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/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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compatible = "ti,omap5";
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interrupt-parent = <&gic>;
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@@ -47,6 +50,14 @@
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clock-frequency = <6144000>;
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};
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+ gic: interrupt-controller@48211000 {
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+ compatible = "arm,cortex-a15-gic";
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+ interrupt-controller;
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+ #interrupt-cells = <3>;
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+ reg = <0x48211000 0x1000>,
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+ <0x48212000 0x1000>;
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+ };
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+
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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@@ -96,14 +107,6 @@
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pinctrl-single,function-mask = <0x7fff>;
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};
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- gic: interrupt-controller@48211000 {
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- compatible = "arm,cortex-a15-gic";
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- interrupt-controller;
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- #interrupt-cells = <3>;
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- reg = <0x48211000 0x1000>,
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- <0x48212000 0x1000>;
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- };
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-
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sdma: dma-controller@4a056000 {
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compatible = "ti,omap4430-sdma";
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reg = <0x4a056000 0x1000>;
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