|
@@ -6301,14 +6301,23 @@ static void
|
|
|
bnx2_dump_state(struct bnx2 *bp)
|
|
|
{
|
|
|
struct net_device *dev = bp->dev;
|
|
|
+ u32 mcp_p0, mcp_p1;
|
|
|
|
|
|
netdev_err(dev, "DEBUG: intr_sem[%x]\n", atomic_read(&bp->intr_sem));
|
|
|
- netdev_err(dev, "DEBUG: EMAC_TX_STATUS[%08x] RPM_MGMT_PKT_CTRL[%08x]\n",
|
|
|
+ netdev_err(dev, "DEBUG: EMAC_TX_STATUS[%08x] EMAC_RX_STATUS[%08x]\n",
|
|
|
REG_RD(bp, BNX2_EMAC_TX_STATUS),
|
|
|
+ REG_RD(bp, BNX2_EMAC_RX_STATUS));
|
|
|
+ netdev_err(dev, "DEBUG: RPM_MGMT_PKT_CTRL[%08x]\n",
|
|
|
REG_RD(bp, BNX2_RPM_MGMT_PKT_CTRL));
|
|
|
+ if (CHIP_NUM(bp) == CHIP_NUM_5709) {
|
|
|
+ mcp_p0 = BNX2_MCP_STATE_P0;
|
|
|
+ mcp_p1 = BNX2_MCP_STATE_P1;
|
|
|
+ } else {
|
|
|
+ mcp_p0 = BNX2_MCP_STATE_P0_5708;
|
|
|
+ mcp_p1 = BNX2_MCP_STATE_P1_5708;
|
|
|
+ }
|
|
|
netdev_err(dev, "DEBUG: MCP_STATE_P0[%08x] MCP_STATE_P1[%08x]\n",
|
|
|
- bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P0),
|
|
|
- bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P1));
|
|
|
+ bnx2_reg_rd_ind(bp, mcp_p0), bnx2_reg_rd_ind(bp, mcp_p1));
|
|
|
netdev_err(dev, "DEBUG: HC_STATS_INTERRUPT_STATUS[%08x]\n",
|
|
|
REG_RD(bp, BNX2_HC_STATS_INTERRUPT_STATUS));
|
|
|
if (bp->flags & BNX2_FLAG_USING_MSIX)
|