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@@ -620,39 +620,38 @@ static void rt2400pci_link_tuner(struct rt2x00_dev *rt2x00dev)
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static void rt2400pci_init_rxentry(struct rt2x00_dev *rt2x00dev,
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struct queue_entry *entry)
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{
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- struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data;
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+ struct queue_entry_priv_pci *entry_priv = entry->priv_data;
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u32 word;
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- rt2x00_desc_read(priv_rx->desc, 2, &word);
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+ rt2x00_desc_read(entry_priv->desc, 2, &word);
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rt2x00_set_field32(&word, RXD_W2_BUFFER_LENGTH,
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entry->queue->data_size);
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- rt2x00_desc_write(priv_rx->desc, 2, word);
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+ rt2x00_desc_write(entry_priv->desc, 2, word);
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- rt2x00_desc_read(priv_rx->desc, 1, &word);
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- rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->data_dma);
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- rt2x00_desc_write(priv_rx->desc, 1, word);
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+ rt2x00_desc_read(entry_priv->desc, 1, &word);
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+ rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, entry_priv->data_dma);
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+ rt2x00_desc_write(entry_priv->desc, 1, word);
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- rt2x00_desc_read(priv_rx->desc, 0, &word);
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+ rt2x00_desc_read(entry_priv->desc, 0, &word);
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rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1);
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- rt2x00_desc_write(priv_rx->desc, 0, word);
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+ rt2x00_desc_write(entry_priv->desc, 0, word);
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}
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static void rt2400pci_init_txentry(struct rt2x00_dev *rt2x00dev,
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struct queue_entry *entry)
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{
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- struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
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+ struct queue_entry_priv_pci *entry_priv = entry->priv_data;
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u32 word;
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- rt2x00_desc_read(priv_tx->desc, 0, &word);
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+ rt2x00_desc_read(entry_priv->desc, 0, &word);
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rt2x00_set_field32(&word, TXD_W0_VALID, 0);
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rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
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- rt2x00_desc_write(priv_tx->desc, 0, word);
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+ rt2x00_desc_write(entry_priv->desc, 0, word);
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}
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static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev)
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{
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- struct queue_entry_priv_pci_rx *priv_rx;
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- struct queue_entry_priv_pci_tx *priv_tx;
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+ struct queue_entry_priv_pci *entry_priv;
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u32 reg;
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/*
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@@ -665,28 +664,28 @@ static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev)
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rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit);
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rt2x00pci_register_write(rt2x00dev, TXCSR2, reg);
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- priv_tx = rt2x00dev->tx[1].entries[0].priv_data;
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+ entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
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rt2x00pci_register_read(rt2x00dev, TXCSR3, ®);
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rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER,
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- priv_tx->desc_dma);
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+ entry_priv->desc_dma);
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rt2x00pci_register_write(rt2x00dev, TXCSR3, reg);
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- priv_tx = rt2x00dev->tx[0].entries[0].priv_data;
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+ entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
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rt2x00pci_register_read(rt2x00dev, TXCSR5, ®);
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rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER,
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- priv_tx->desc_dma);
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+ entry_priv->desc_dma);
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rt2x00pci_register_write(rt2x00dev, TXCSR5, reg);
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- priv_tx = rt2x00dev->bcn[1].entries[0].priv_data;
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+ entry_priv = rt2x00dev->bcn[1].entries[0].priv_data;
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rt2x00pci_register_read(rt2x00dev, TXCSR4, ®);
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rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER,
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- priv_tx->desc_dma);
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+ entry_priv->desc_dma);
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rt2x00pci_register_write(rt2x00dev, TXCSR4, reg);
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- priv_tx = rt2x00dev->bcn[0].entries[0].priv_data;
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+ entry_priv = rt2x00dev->bcn[0].entries[0].priv_data;
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rt2x00pci_register_read(rt2x00dev, TXCSR6, ®);
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rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER,
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- priv_tx->desc_dma);
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+ entry_priv->desc_dma);
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rt2x00pci_register_write(rt2x00dev, TXCSR6, reg);
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rt2x00pci_register_read(rt2x00dev, RXCSR1, ®);
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@@ -694,9 +693,10 @@ static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev)
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rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit);
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rt2x00pci_register_write(rt2x00dev, RXCSR1, reg);
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- priv_rx = rt2x00dev->rx->entries[0].priv_data;
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+ entry_priv = rt2x00dev->rx->entries[0].priv_data;
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rt2x00pci_register_read(rt2x00dev, RXCSR2, ®);
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- rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, priv_rx->desc_dma);
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+ rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER,
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+ entry_priv->desc_dma);
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rt2x00pci_register_write(rt2x00dev, RXCSR2, reg);
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return 0;
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@@ -995,7 +995,7 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
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struct txentry_desc *txdesc)
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{
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struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
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- struct queue_entry_priv_pci_tx *entry_priv = skbdesc->entry->priv_data;
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+ struct queue_entry_priv_pci *entry_priv = skbdesc->entry->priv_data;
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__le32 *txd = skbdesc->desc;
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u32 word;
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@@ -1078,14 +1078,14 @@ static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
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static void rt2400pci_fill_rxdone(struct queue_entry *entry,
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struct rxdone_entry_desc *rxdesc)
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{
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- struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data;
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+ struct queue_entry_priv_pci *entry_priv = entry->priv_data;
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u32 word0;
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u32 word2;
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u32 word3;
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- rt2x00_desc_read(priv_rx->desc, 0, &word0);
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- rt2x00_desc_read(priv_rx->desc, 2, &word2);
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- rt2x00_desc_read(priv_rx->desc, 3, &word3);
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+ rt2x00_desc_read(entry_priv->desc, 0, &word0);
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+ rt2x00_desc_read(entry_priv->desc, 2, &word2);
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+ rt2x00_desc_read(entry_priv->desc, 3, &word3);
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if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
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rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
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@@ -1114,15 +1114,15 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev,
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const enum data_queue_qid queue_idx)
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{
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struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
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- struct queue_entry_priv_pci_tx *priv_tx;
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+ struct queue_entry_priv_pci *entry_priv;
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struct queue_entry *entry;
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struct txdone_entry_desc txdesc;
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u32 word;
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while (!rt2x00queue_empty(queue)) {
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entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
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- priv_tx = entry->priv_data;
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- rt2x00_desc_read(priv_tx->desc, 0, &word);
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+ entry_priv = entry->priv_data;
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+ rt2x00_desc_read(entry_priv->desc, 0, &word);
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if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
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!rt2x00_get_field32(word, TXD_W0_VALID))
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@@ -1489,14 +1489,14 @@ static int rt2400pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
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{
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struct rt2x00_dev *rt2x00dev = hw->priv;
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struct rt2x00_intf *intf = vif_to_intf(control->vif);
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- struct queue_entry_priv_pci_tx *priv_tx;
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+ struct queue_entry_priv_pci *entry_priv;
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struct skb_frame_desc *skbdesc;
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struct txentry_desc txdesc;
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u32 reg;
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if (unlikely(!intf->beacon))
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return -ENOBUFS;
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- priv_tx = intf->beacon->priv_data;
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+ entry_priv = intf->beacon->priv_data;
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/*
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* Copy all TX descriptor information into txdesc,
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@@ -1514,7 +1514,7 @@ static int rt2400pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
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skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
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skbdesc->data = skb->data;
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skbdesc->data_len = skb->len;
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- skbdesc->desc = priv_tx->desc;
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+ skbdesc->desc = entry_priv->desc;
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skbdesc->desc_len = intf->beacon->queue->desc_size;
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skbdesc->entry = intf->beacon;
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@@ -1533,7 +1533,7 @@ static int rt2400pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
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* Write entire beacon with descriptor to register,
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* and kick the beacon generator.
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*/
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- memcpy(priv_tx->data, skb->data, skb->len);
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+ memcpy(entry_priv->data, skb->data, skb->len);
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rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
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rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
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@@ -1594,28 +1594,28 @@ static const struct data_queue_desc rt2400pci_queue_rx = {
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.entry_num = RX_ENTRIES,
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.data_size = DATA_FRAME_SIZE,
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.desc_size = RXD_DESC_SIZE,
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- .priv_size = sizeof(struct queue_entry_priv_pci_rx),
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+ .priv_size = sizeof(struct queue_entry_priv_pci),
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};
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static const struct data_queue_desc rt2400pci_queue_tx = {
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.entry_num = TX_ENTRIES,
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.data_size = DATA_FRAME_SIZE,
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.desc_size = TXD_DESC_SIZE,
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- .priv_size = sizeof(struct queue_entry_priv_pci_tx),
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+ .priv_size = sizeof(struct queue_entry_priv_pci),
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};
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static const struct data_queue_desc rt2400pci_queue_bcn = {
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.entry_num = BEACON_ENTRIES,
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.data_size = MGMT_FRAME_SIZE,
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.desc_size = TXD_DESC_SIZE,
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- .priv_size = sizeof(struct queue_entry_priv_pci_tx),
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+ .priv_size = sizeof(struct queue_entry_priv_pci),
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};
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static const struct data_queue_desc rt2400pci_queue_atim = {
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.entry_num = ATIM_ENTRIES,
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.data_size = DATA_FRAME_SIZE,
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.desc_size = TXD_DESC_SIZE,
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- .priv_size = sizeof(struct queue_entry_priv_pci_tx),
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+ .priv_size = sizeof(struct queue_entry_priv_pci),
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};
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static const struct rt2x00_ops rt2400pci_ops = {
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