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@@ -709,24 +709,6 @@
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#define ADPA_DPMS_STANDBY (2<<10)
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#define ADPA_DPMS_STANDBY (2<<10)
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#define ADPA_DPMS_OFF (3<<10)
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#define ADPA_DPMS_OFF (3<<10)
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-#define RING_TAIL 0x00
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-#define TAIL_ADDR 0x001FFFF8
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-#define RING_HEAD 0x04
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-#define HEAD_WRAP_COUNT 0xFFE00000
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-#define HEAD_WRAP_ONE 0x00200000
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-#define HEAD_ADDR 0x001FFFFC
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-#define RING_START 0x08
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-#define START_ADDR 0xFFFFF000
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-#define RING_LEN 0x0C
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-#define RING_NR_PAGES 0x001FF000
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-#define RING_REPORT_MASK 0x00000006
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-#define RING_REPORT_64K 0x00000002
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-#define RING_REPORT_128K 0x00000004
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-#define RING_NO_REPORT 0x00000000
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-#define RING_VALID_MASK 0x00000001
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-#define RING_VALID 0x00000001
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-#define RING_INVALID 0x00000000
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-
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/* Scratch pad debug 0 reg:
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/* Scratch pad debug 0 reg:
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*/
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*/
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#define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
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#define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
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