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@@ -421,6 +421,10 @@ static struct clk aes0_fck;
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DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL);
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DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null);
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+static struct clk rng_fck;
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+DEFINE_STRUCT_CLK_HW_OMAP(rng_fck, NULL);
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+DEFINE_STRUCT_CLK(rng_fck, dpll_core_ck_parents, clk_ops_null);
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+
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/*
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* Modules clock nodes
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*
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@@ -966,6 +970,7 @@ static struct omap_clk am33xx_clks[] = {
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CLK(NULL, "smartreflex1_fck", &smartreflex1_fck),
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CLK(NULL, "sha0_fck", &sha0_fck),
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CLK(NULL, "aes0_fck", &aes0_fck),
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+ CLK(NULL, "rng_fck", &rng_fck),
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CLK(NULL, "timer1_fck", &timer1_fck),
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CLK(NULL, "timer2_fck", &timer2_fck),
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CLK(NULL, "timer3_fck", &timer3_fck),
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