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@@ -34,6 +34,7 @@ static unsigned int debug_quirks = 0;
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/* Controller doesn't like some resets when there is no card inserted. */
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#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
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#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3)
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+#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4)
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static const struct pci_device_id pci_ids[] __devinitdata = {
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{
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@@ -78,6 +79,24 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
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.driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE,
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},
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+ {
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+ .vendor = PCI_VENDOR_ID_ENE,
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+ .device = PCI_DEVICE_ID_ENE_CB714_SD,
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+ .subvendor = PCI_ANY_ID,
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+ .subdevice = PCI_ANY_ID,
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+ .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
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+ SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
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+ },
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+
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+ {
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+ .vendor = PCI_VENDOR_ID_ENE,
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+ .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
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+ .subvendor = PCI_ANY_ID,
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+ .subdevice = PCI_ANY_ID,
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+ .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
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+ SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
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+ },
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+
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{ /* Generic SD host controller */
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PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
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},
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@@ -759,6 +778,14 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
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+ /*
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+ * Some (ENE) controllers go apeshit on some ios operation,
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+ * signalling timeout and CRC errors even on CMD0. Resetting
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+ * it on each ios seems to solve the problem.
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+ */
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+ if(host->chip->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
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+ sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
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+
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mmiowb();
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spin_unlock_irqrestore(&host->lock, flags);
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}
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