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@@ -3084,6 +3084,16 @@ void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
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REG_CLR_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
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gen_tmr_configuration[timer->index].mode_mask);
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+ if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
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+ /*
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+ * Need to switch back to TSF if it was using TSF2.
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+ */
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+ if ((timer->index >= AR_GEN_TIMER_BANK_1_LEN)) {
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+ REG_CLR_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL,
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+ (1 << timer->index));
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+ }
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+ }
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+
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/* Disable both trigger and thresh interrupt masks */
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REG_CLR_BIT(ah, AR_IMR_S5,
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(SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
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