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@@ -256,7 +256,7 @@ static int bist_rd(adapter_t *adapter, int moduleid, int address)
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else if((result & (1<<8)) != 0x0)
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CH_ERR("bist read error: 0x%x\n", result);
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- return(result & 0xff);
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+ return (result & 0xff);
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}
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static int bist_wr(adapter_t *adapter, int moduleid, int address, int value)
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@@ -286,7 +286,7 @@ static int bist_wr(adapter_t *adapter, int moduleid, int address, int value)
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else if((result & (1<<26)) != 0x0)
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CH_ERR("bist write error: 0x%x\n", result);
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- return(0);
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+ return 0;
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}
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static int run_bist(adapter_t *adapter, int moduleid)
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@@ -295,7 +295,7 @@ static int run_bist(adapter_t *adapter, int moduleid)
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(void) bist_wr(adapter,moduleid, 0x00, 0x02);
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(void) bist_wr(adapter,moduleid, 0x01, 0x01);
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- return(0);
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+ return 0;
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}
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static int check_bist(adapter_t *adapter, int moduleid)
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@@ -309,14 +309,14 @@ static int check_bist(adapter_t *adapter, int moduleid)
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if ((result & 3) != 0x3)
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CH_ERR("Result: 0x%x BIST error in ram %d, column: 0x%04x\n",
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result, moduleid, column);
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- return(0);
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+ return 0;
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}
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static int enable_mem(adapter_t *adapter, int moduleid)
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{
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/*enable mem*/
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(void) bist_wr(adapter,moduleid, 0x00, 0x00);
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- return(0);
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+ return 0;
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}
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static int run_bist_all(adapter_t *adapter)
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@@ -358,7 +358,7 @@ static int run_bist_all(adapter_t *adapter)
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udelay(300);
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vsc_write(adapter, REG_MEM_BIST, 0x0);
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mdelay(10);
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- return(0);
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+ return 0;
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}
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static int mac_intr_handler(struct cmac *mac)
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