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@@ -111,20 +111,6 @@
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#define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) == MSR_TS_T)
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#define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) == MSR_TS_T)
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#define MSR_TM_SUSPENDED(x) (((x) & MSR_TS_MASK) == MSR_TS_S)
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#define MSR_TM_SUSPENDED(x) (((x) & MSR_TS_MASK) == MSR_TS_S)
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-/* Reason codes describing kernel causes for transaction aborts. By
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- convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if
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- the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor.
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-*/
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-#define TM_CAUSE_PERSISTENT 0x01
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-#define TM_CAUSE_RESCHED 0xde
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-#define TM_CAUSE_TLBI 0xdc
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-#define TM_CAUSE_FAC_UNAV 0xda
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-#define TM_CAUSE_SYSCALL 0xd8 /* future use */
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-#define TM_CAUSE_MISC 0xd6 /* future use */
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-#define TM_CAUSE_SIGNAL 0xd4
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-#define TM_CAUSE_ALIGNMENT 0xd2
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-#define TM_CAUSE_EMULATE 0xd0
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-
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#if defined(CONFIG_PPC_BOOK3S_64)
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#if defined(CONFIG_PPC_BOOK3S_64)
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#define MSR_64BIT MSR_SF
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#define MSR_64BIT MSR_SF
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