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@@ -59,6 +59,11 @@ static struct platform_device *pdev;
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#define DRVNAME "w83627hf"
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enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
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+struct w83627hf_sio_data {
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+ enum chips type;
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+ int sioaddr;
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+};
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+
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static u8 force_i2c = 0x1f;
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module_param(force_i2c, byte, 0);
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MODULE_PARM_DESC(force_i2c,
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@@ -73,9 +78,7 @@ module_param(force_id, ushort, 0);
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MODULE_PARM_DESC(force_id, "Override the detected device ID");
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/* modified from kernel/include/traps.c */
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-static int REG; /* The register to read/write */
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#define DEV 0x07 /* Register: Logical device select */
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-static int VAL; /* The value to read/write */
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/* logical device numbers for superio_select (below) */
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#define W83627HF_LD_FDC 0x00
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@@ -105,37 +108,37 @@ static int VAL; /* The value to read/write */
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#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
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static inline void
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-superio_outb(int reg, int val)
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+superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
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{
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- outb(reg, REG);
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- outb(val, VAL);
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+ outb(reg, sio->sioaddr);
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+ outb(val, sio->sioaddr + 1);
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}
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static inline int
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-superio_inb(int reg)
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+superio_inb(struct w83627hf_sio_data *sio, int reg)
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{
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- outb(reg, REG);
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- return inb(VAL);
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+ outb(reg, sio->sioaddr);
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+ return inb(sio->sioaddr + 1);
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}
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static inline void
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-superio_select(int ld)
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+superio_select(struct w83627hf_sio_data *sio, int ld)
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{
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- outb(DEV, REG);
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- outb(ld, VAL);
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+ outb(DEV, sio->sioaddr);
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+ outb(ld, sio->sioaddr + 1);
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}
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static inline void
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-superio_enter(void)
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+superio_enter(struct w83627hf_sio_data *sio)
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{
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- outb(0x87, REG);
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- outb(0x87, REG);
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+ outb(0x87, sio->sioaddr);
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+ outb(0x87, sio->sioaddr);
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}
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static inline void
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-superio_exit(void)
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+superio_exit(struct w83627hf_sio_data *sio)
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{
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- outb(0xAA, REG);
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+ outb(0xAA, sio->sioaddr);
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}
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#define W627_DEVID 0x52
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@@ -376,10 +379,6 @@ struct w83627hf_data {
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u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
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};
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-struct w83627hf_sio_data {
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- enum chips type;
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-};
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-
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static int w83627hf_probe(struct platform_device *pdev);
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static int __devexit w83627hf_remove(struct platform_device *pdev);
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@@ -1136,11 +1135,8 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
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"W83687THF",
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};
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- REG = sioaddr;
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- VAL = sioaddr + 1;
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-
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- superio_enter();
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- val = force_id ? force_id : superio_inb(DEVID);
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+ superio_enter(sio_data);
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+ val = force_id ? force_id : superio_inb(sio_data, DEVID);
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switch (val) {
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case W627_DEVID:
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sio_data->type = w83627hf;
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@@ -1164,9 +1160,9 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
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goto exit;
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}
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- superio_select(W83627HF_LD_HWM);
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- val = (superio_inb(WINB_BASE_REG) << 8) |
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- superio_inb(WINB_BASE_REG + 1);
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+ superio_select(sio_data, W83627HF_LD_HWM);
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+ val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
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+ superio_inb(sio_data, WINB_BASE_REG + 1);
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*addr = val & WINB_ALIGNMENT;
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if (*addr == 0) {
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printk(KERN_WARNING DRVNAME ": Base address not set, "
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@@ -1174,18 +1170,19 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
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goto exit;
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}
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- val = superio_inb(WINB_ACT_REG);
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+ val = superio_inb(sio_data, WINB_ACT_REG);
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if (!(val & 0x01)) {
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printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
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- superio_outb(WINB_ACT_REG, val | 0x01);
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+ superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
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}
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err = 0;
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+ sio_data->sioaddr = sioaddr;
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pr_info(DRVNAME ": Found %s chip at %#x\n",
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names[sio_data->type], *addr);
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exit:
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- superio_exit();
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+ superio_exit(sio_data);
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return err;
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}
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@@ -1500,20 +1497,21 @@ static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
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static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
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{
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+ struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
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int res = 0xff, sel;
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- superio_enter();
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- superio_select(W83627HF_LD_GPIO5);
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+ superio_enter(sio_data);
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+ superio_select(sio_data, W83627HF_LD_GPIO5);
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/* Make sure these GPIO pins are enabled */
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- if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
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+ if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
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dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
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goto exit;
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}
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/* Make sure the pins are configured for input
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There must be at least five (VRM 9), and possibly 6 (VRM 10) */
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- sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
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+ sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
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if ((sel & 0x1f) != 0x1f) {
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dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
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"function\n");
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@@ -1521,37 +1519,38 @@ static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
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}
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dev_info(&pdev->dev, "Reading VID from GPIO5\n");
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- res = superio_inb(W83627THF_GPIO5_DR) & sel;
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+ res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
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exit:
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- superio_exit();
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+ superio_exit(sio_data);
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return res;
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}
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static int __devinit w83687thf_read_vid(struct platform_device *pdev)
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{
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+ struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
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int res = 0xff;
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- superio_enter();
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- superio_select(W83627HF_LD_HWM);
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+ superio_enter(sio_data);
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+ superio_select(sio_data, W83627HF_LD_HWM);
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/* Make sure these GPIO pins are enabled */
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- if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
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+ if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
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dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
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goto exit;
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}
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/* Make sure the pins are configured for input */
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- if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
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+ if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
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dev_dbg(&pdev->dev, "VID configured as output, "
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"no VID function\n");
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goto exit;
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}
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- res = superio_inb(W83687THF_VID_DATA) & 0x3f;
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+ res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
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exit:
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- superio_exit();
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+ superio_exit(sio_data);
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return res;
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}
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