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@@ -52,56 +52,6 @@ typedef struct _pci_config_regs {
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} pci_config_regs;
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#define SZPCR (sizeof (pci_config_regs))
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-#define MINSZPCR 64 /* offsetof (dev_dep[0] */
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-
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-/* Classes and subclasses */
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-
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-/* Overlay for a PCI-to-PCI bridge */
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-
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-#define PPB_RSVDA_MAX 2
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-#define PPB_RSVDD_MAX 8
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-
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-typedef struct _ppb_config_regs {
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- u16 vendor;
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- u16 device;
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- u16 command;
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- u16 status;
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- u8 rev_id;
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- u8 prog_if;
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- u8 sub_class;
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- u8 base_class;
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- u8 cache_line_size;
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- u8 latency_timer;
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- u8 header_type;
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- u8 bist;
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- u32 rsvd_a[PPB_RSVDA_MAX];
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- u8 prim_bus;
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- u8 sec_bus;
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- u8 sub_bus;
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- u8 sec_lat;
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- u8 io_base;
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- u8 io_lim;
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- u16 sec_status;
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- u16 mem_base;
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- u16 mem_lim;
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- u16 pf_mem_base;
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- u16 pf_mem_lim;
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- u32 pf_mem_base_hi;
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- u32 pf_mem_lim_hi;
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- u16 io_base_hi;
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- u16 io_lim_hi;
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- u16 subsys_vendor;
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- u16 subsys_id;
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- u32 rsvd_b;
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- u8 rsvd_c;
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- u8 int_pin;
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- u16 bridge_ctrl;
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- u8 chip_ctrl;
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- u8 diag_ctrl;
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- u16 arb_ctrl;
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- u32 rsvd_d[PPB_RSVDD_MAX];
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- u8 dev_dep[192];
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-} ppb_config_regs;
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/* Everything below is BRCM HND proprietary */
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