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@@ -11,7 +11,7 @@
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* For read{b,w,l} and write{b,w,l} there are also __raw versions, which
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* For read{b,w,l} and write{b,w,l} there are also __raw versions, which
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* do not have a memory barrier after them.
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* do not have a memory barrier after them.
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*
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*
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- * In addition, we have
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+ * In addition, we have
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* ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
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* ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
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* which are processor specific.
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* which are processor specific.
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*/
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*/
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@@ -23,19 +23,27 @@
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* inb by default expands to _inb, but the machine specific code may
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* inb by default expands to _inb, but the machine specific code may
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* define it to __inb if it chooses.
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* define it to __inb if it chooses.
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*/
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*/
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-
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+#include <linux/config.h>
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#include <asm/cache.h>
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#include <asm/cache.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#include <asm/addrspace.h>
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#include <asm/addrspace.h>
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#include <asm/machvec.h>
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#include <asm/machvec.h>
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-#include <linux/config.h>
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+#include <asm/pgtable.h>
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+#include <asm-generic/iomap.h>
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+
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+#ifdef __KERNEL__
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/*
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/*
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* Depending on which platform we are running on, we need different
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* Depending on which platform we are running on, we need different
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* I/O functions.
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* I/O functions.
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*/
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*/
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+#define __IO_PREFIX generic
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+#include <asm/io_generic.h>
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+
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+#define maybebadio(port) \
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+ printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
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+ __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0))
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-#ifdef __KERNEL__
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/*
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/*
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* Since boards are able to define their own set of I/O routines through
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* Since boards are able to define their own set of I/O routines through
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* their respective machine vector, we always wrap through the mv.
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* their respective machine vector, we always wrap through the mv.
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@@ -44,113 +52,120 @@
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* a given routine, it will be wrapped to generic code at run-time.
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* a given routine, it will be wrapped to generic code at run-time.
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*/
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*/
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-# define __inb(p) sh_mv.mv_inb((p))
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-# define __inw(p) sh_mv.mv_inw((p))
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-# define __inl(p) sh_mv.mv_inl((p))
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-# define __outb(x,p) sh_mv.mv_outb((x),(p))
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-# define __outw(x,p) sh_mv.mv_outw((x),(p))
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-# define __outl(x,p) sh_mv.mv_outl((x),(p))
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-
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-# define __inb_p(p) sh_mv.mv_inb_p((p))
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-# define __inw_p(p) sh_mv.mv_inw_p((p))
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-# define __inl_p(p) sh_mv.mv_inl_p((p))
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-# define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
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-# define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
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-# define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
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-
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-# define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
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-# define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
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-# define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
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-# define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
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-# define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
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-# define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
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-
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-# define __readb(a) sh_mv.mv_readb((a))
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-# define __readw(a) sh_mv.mv_readw((a))
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-# define __readl(a) sh_mv.mv_readl((a))
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-# define __writeb(v,a) sh_mv.mv_writeb((v),(a))
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-# define __writew(v,a) sh_mv.mv_writew((v),(a))
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-# define __writel(v,a) sh_mv.mv_writel((v),(a))
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-
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-# define __ioremap(a,s) sh_mv.mv_ioremap((a), (s))
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-# define __iounmap(a) sh_mv.mv_iounmap((a))
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-
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-# define __isa_port2addr(a) sh_mv.mv_isa_port2addr(a)
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-
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-# define inb __inb
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-# define inw __inw
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-# define inl __inl
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-# define outb __outb
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-# define outw __outw
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-# define outl __outl
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-
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-# define inb_p __inb_p
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-# define inw_p __inw_p
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-# define inl_p __inl_p
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-# define outb_p __outb_p
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-# define outw_p __outw_p
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-# define outl_p __outl_p
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-
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-# define insb __insb
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-# define insw __insw
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-# define insl __insl
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-# define outsb __outsb
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-# define outsw __outsw
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-# define outsl __outsl
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-
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-# define __raw_readb __readb
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-# define __raw_readw __readw
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-# define __raw_readl __readl
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-# define __raw_writeb __writeb
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-# define __raw_writew __writew
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-# define __raw_writel __writel
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+#define __inb(p) sh_mv.mv_inb((p))
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+#define __inw(p) sh_mv.mv_inw((p))
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+#define __inl(p) sh_mv.mv_inl((p))
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+#define __outb(x,p) sh_mv.mv_outb((x),(p))
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+#define __outw(x,p) sh_mv.mv_outw((x),(p))
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+#define __outl(x,p) sh_mv.mv_outl((x),(p))
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+
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+#define __inb_p(p) sh_mv.mv_inb_p((p))
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+#define __inw_p(p) sh_mv.mv_inw_p((p))
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+#define __inl_p(p) sh_mv.mv_inl_p((p))
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+#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
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+#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
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+#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
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+
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+#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
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+#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
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+#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
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+#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
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+#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
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+#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
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+
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+#define __readb(a) sh_mv.mv_readb((a))
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+#define __readw(a) sh_mv.mv_readw((a))
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+#define __readl(a) sh_mv.mv_readl((a))
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+#define __writeb(v,a) sh_mv.mv_writeb((v),(a))
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+#define __writew(v,a) sh_mv.mv_writew((v),(a))
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+#define __writel(v,a) sh_mv.mv_writel((v),(a))
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+
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+#define inb __inb
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+#define inw __inw
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+#define inl __inl
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+#define outb __outb
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+#define outw __outw
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+#define outl __outl
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+
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+#define inb_p __inb_p
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+#define inw_p __inw_p
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+#define inl_p __inl_p
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+#define outb_p __outb_p
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+#define outw_p __outw_p
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+#define outl_p __outl_p
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+
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+#define insb __insb
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+#define insw __insw
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+#define insl __insl
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+#define outsb __outsb
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+#define outsw __outsw
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+#define outsl __outsl
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+
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+#define __raw_readb(a) __readb((void __iomem *)(a))
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+#define __raw_readw(a) __readw((void __iomem *)(a))
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+#define __raw_readl(a) __readl((void __iomem *)(a))
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+#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
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+#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
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+#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
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/*
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/*
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* The platform header files may define some of these macros to use
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* The platform header files may define some of these macros to use
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* the inlined versions where appropriate. These macros may also be
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* the inlined versions where appropriate. These macros may also be
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* redefined by userlevel programs.
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* redefined by userlevel programs.
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*/
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*/
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-#ifdef __raw_readb
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-# define readb(a) ({ unsigned long r_ = __raw_readb((unsigned long)a); mb(); r_; })
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+#ifdef __readb
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+# define readb(a) ({ unsigned long r_ = __raw_readb(a); mb(); r_; })
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#endif
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#endif
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#ifdef __raw_readw
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#ifdef __raw_readw
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-# define readw(a) ({ unsigned long r_ = __raw_readw((unsigned long)a); mb(); r_; })
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+# define readw(a) ({ unsigned long r_ = __raw_readw(a); mb(); r_; })
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#endif
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#endif
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#ifdef __raw_readl
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#ifdef __raw_readl
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-# define readl(a) ({ unsigned long r_ = __raw_readl((unsigned long)a); mb(); r_; })
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+# define readl(a) ({ unsigned long r_ = __raw_readl(a); mb(); r_; })
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#endif
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#endif
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#ifdef __raw_writeb
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#ifdef __raw_writeb
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-# define writeb(v,a) ({ __raw_writeb((v),(unsigned long)(a)); mb(); })
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+# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
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#endif
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#endif
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#ifdef __raw_writew
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#ifdef __raw_writew
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-# define writew(v,a) ({ __raw_writew((v),(unsigned long)(a)); mb(); })
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+# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
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#endif
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#endif
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#ifdef __raw_writel
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#ifdef __raw_writel
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-# define writel(v,a) ({ __raw_writel((v),(unsigned long)(a)); mb(); })
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+# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
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#endif
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#endif
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#define readb_relaxed(a) readb(a)
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#define readb_relaxed(a) readb(a)
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#define readw_relaxed(a) readw(a)
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#define readw_relaxed(a) readw(a)
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#define readl_relaxed(a) readl(a)
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#define readl_relaxed(a) readl(a)
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-#define mmiowb()
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+/* Simple MMIO */
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+#define ioread8(a) readb(a)
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+#define ioread16(a) readw(a)
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+#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
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+#define ioread32(a) readl(a)
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+#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
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-/*
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- * If the platform has PC-like I/O, this function converts the offset into
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- * an address.
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- */
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-static __inline__ unsigned long isa_port2addr(unsigned long offset)
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-{
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- return __isa_port2addr(offset);
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-}
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+#define iowrite8(v,a) writeb((v),(a))
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+#define iowrite16(v,a) writew((v),(a))
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+#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
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+#define iowrite32(v,a) writel((v),(a))
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+#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
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+
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+#define ioread8_rep(a,d,c) insb((a),(d),(c))
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+#define ioread16_rep(a,d,c) insw((a),(d),(c))
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+#define ioread32_rep(a,d,c) insl((a),(d),(c))
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+
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+#define iowrite8_rep(a,s,c) outsb((a),(s),(c))
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+#define iowrite16_rep(a,s,c) outsw((a),(s),(c))
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+#define iowrite32_rep(a,s,c) outsl((a),(s),(c))
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+
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+#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
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/*
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/*
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* This function provides a method for the generic case where a board-specific
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* This function provides a method for the generic case where a board-specific
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- * isa_port2addr simply needs to return the port + some arbitrary port base.
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+ * ioport_map simply needs to return the port + some arbitrary port base.
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*
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*
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* We use this at board setup time to implicitly set the port base, and
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* We use this at board setup time to implicitly set the port base, and
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- * as a result, we can use the generic isa_port2addr.
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+ * as a result, we can use the generic ioport_map.
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*/
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*/
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static inline void __set_io_port_base(unsigned long pbase)
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static inline void __set_io_port_base(unsigned long pbase)
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{
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{
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@@ -159,51 +174,52 @@ static inline void __set_io_port_base(unsigned long pbase)
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generic_io_base = pbase;
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generic_io_base = pbase;
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}
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}
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-#define isa_readb(a) readb(isa_port2addr(a))
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-#define isa_readw(a) readw(isa_port2addr(a))
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-#define isa_readl(a) readl(isa_port2addr(a))
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-#define isa_writeb(b,a) writeb(b,isa_port2addr(a))
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-#define isa_writew(w,a) writew(w,isa_port2addr(a))
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-#define isa_writel(l,a) writel(l,isa_port2addr(a))
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+#define isa_readb(a) readb(ioport_map(a, 1))
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+#define isa_readw(a) readw(ioport_map(a, 2))
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+#define isa_readl(a) readl(ioport_map(a, 4))
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+#define isa_writeb(b,a) writeb(b,ioport_map(a, 1))
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+#define isa_writew(w,a) writew(w,ioport_map(a, 2))
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+#define isa_writel(l,a) writel(l,ioport_map(a, 4))
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+
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#define isa_memset_io(a,b,c) \
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#define isa_memset_io(a,b,c) \
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- memset((void *)(isa_port2addr((unsigned long)a)),(b),(c))
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+ memset((void *)(ioport_map((unsigned long)(a), 1)),(b),(c))
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#define isa_memcpy_fromio(a,b,c) \
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#define isa_memcpy_fromio(a,b,c) \
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- memcpy((a),(void *)(isa_port2addr((unsigned long)(b))),(c))
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+ memcpy((a),(void *)(ioport_map((unsigned long)(b), 1)),(c))
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#define isa_memcpy_toio(a,b,c) \
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#define isa_memcpy_toio(a,b,c) \
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- memcpy((void *)(isa_port2addr((unsigned long)(a))),(b),(c))
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+ memcpy((void *)(ioport_map((unsigned long)(a), 1)),(b),(c))
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/* We really want to try and get these to memcpy etc */
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/* We really want to try and get these to memcpy etc */
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-extern void memcpy_fromio(void *, unsigned long, unsigned long);
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-extern void memcpy_toio(unsigned long, const void *, unsigned long);
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-extern void memset_io(unsigned long, int, unsigned long);
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|
|
|
|
|
+extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long);
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|
|
|
+extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
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|
|
|
+extern void memset_io(volatile void __iomem *, int, unsigned long);
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|
|
|
|
|
/* SuperH on-chip I/O functions */
|
|
/* SuperH on-chip I/O functions */
|
|
-static __inline__ unsigned char ctrl_inb(unsigned long addr)
|
|
|
|
|
|
+static inline unsigned char ctrl_inb(unsigned long addr)
|
|
{
|
|
{
|
|
return *(volatile unsigned char*)addr;
|
|
return *(volatile unsigned char*)addr;
|
|
}
|
|
}
|
|
|
|
|
|
-static __inline__ unsigned short ctrl_inw(unsigned long addr)
|
|
|
|
|
|
+static inline unsigned short ctrl_inw(unsigned long addr)
|
|
{
|
|
{
|
|
return *(volatile unsigned short*)addr;
|
|
return *(volatile unsigned short*)addr;
|
|
}
|
|
}
|
|
|
|
|
|
-static __inline__ unsigned int ctrl_inl(unsigned long addr)
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|
|
|
|
|
+static inline unsigned int ctrl_inl(unsigned long addr)
|
|
{
|
|
{
|
|
return *(volatile unsigned long*)addr;
|
|
return *(volatile unsigned long*)addr;
|
|
}
|
|
}
|
|
|
|
|
|
-static __inline__ void ctrl_outb(unsigned char b, unsigned long addr)
|
|
|
|
|
|
+static inline void ctrl_outb(unsigned char b, unsigned long addr)
|
|
{
|
|
{
|
|
*(volatile unsigned char*)addr = b;
|
|
*(volatile unsigned char*)addr = b;
|
|
}
|
|
}
|
|
|
|
|
|
-static __inline__ void ctrl_outw(unsigned short b, unsigned long addr)
|
|
|
|
|
|
+static inline void ctrl_outw(unsigned short b, unsigned long addr)
|
|
{
|
|
{
|
|
*(volatile unsigned short*)addr = b;
|
|
*(volatile unsigned short*)addr = b;
|
|
}
|
|
}
|
|
|
|
|
|
-static __inline__ void ctrl_outl(unsigned int b, unsigned long addr)
|
|
|
|
|
|
+static inline void ctrl_outl(unsigned int b, unsigned long addr)
|
|
{
|
|
{
|
|
*(volatile unsigned long*)addr = b;
|
|
*(volatile unsigned long*)addr = b;
|
|
}
|
|
}
|
|
@@ -214,12 +230,12 @@ static __inline__ void ctrl_outl(unsigned int b, unsigned long addr)
|
|
* Change virtual addresses to physical addresses and vv.
|
|
* Change virtual addresses to physical addresses and vv.
|
|
* These are trivial on the 1:1 Linux/SuperH mapping
|
|
* These are trivial on the 1:1 Linux/SuperH mapping
|
|
*/
|
|
*/
|
|
-static __inline__ unsigned long virt_to_phys(volatile void * address)
|
|
|
|
|
|
+static inline unsigned long virt_to_phys(volatile void *address)
|
|
{
|
|
{
|
|
return PHYSADDR(address);
|
|
return PHYSADDR(address);
|
|
}
|
|
}
|
|
|
|
|
|
-static __inline__ void * phys_to_virt(unsigned long address)
|
|
|
|
|
|
+static inline void *phys_to_virt(unsigned long address)
|
|
{
|
|
{
|
|
return (void *)P1SEGADDR(address);
|
|
return (void *)P1SEGADDR(address);
|
|
}
|
|
}
|
|
@@ -234,27 +250,60 @@ static __inline__ void * phys_to_virt(unsigned long address)
|
|
* differently. On the x86 architecture, we just read/write the
|
|
* differently. On the x86 architecture, we just read/write the
|
|
* memory location directly.
|
|
* memory location directly.
|
|
*
|
|
*
|
|
- * On SH, we have the whole physical address space mapped at all times
|
|
|
|
- * (as MIPS does), so "ioremap()" and "iounmap()" do not need to do
|
|
|
|
- * anything. (This isn't true for all machines but we still handle
|
|
|
|
- * these cases with wired TLB entries anyway ...)
|
|
|
|
|
|
+ * On SH, we traditionally have the whole physical address space mapped
|
|
|
|
+ * at all times (as MIPS does), so "ioremap()" and "iounmap()" do not
|
|
|
|
+ * need to do anything but place the address in the proper segment. This
|
|
|
|
+ * is true for P1 and P2 addresses, as well as some P3 ones. However,
|
|
|
|
+ * most of the P3 addresses and newer cores using extended addressing
|
|
|
|
+ * need to map through page tables, so the ioremap() implementation
|
|
|
|
+ * becomes a bit more complicated. See arch/sh/mm/ioremap.c for
|
|
|
|
+ * additional notes on this.
|
|
*
|
|
*
|
|
* We cheat a bit and always return uncachable areas until we've fixed
|
|
* We cheat a bit and always return uncachable areas until we've fixed
|
|
- * the drivers to handle caching properly.
|
|
|
|
|
|
+ * the drivers to handle caching properly.
|
|
*/
|
|
*/
|
|
-static __inline__ void * ioremap(unsigned long offset, unsigned long size)
|
|
|
|
|
|
+#ifdef CONFIG_MMU
|
|
|
|
+void __iomem *__ioremap(unsigned long offset, unsigned long size,
|
|
|
|
+ unsigned long flags);
|
|
|
|
+void __iounmap(void __iomem *addr);
|
|
|
|
+#else
|
|
|
|
+#define __ioremap(offset, size, flags) ((void __iomem *)(offset))
|
|
|
|
+#define __iounmap(addr) do { } while (0)
|
|
|
|
+#endif /* CONFIG_MMU */
|
|
|
|
+
|
|
|
|
+static inline void __iomem *
|
|
|
|
+__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
|
|
{
|
|
{
|
|
- return __ioremap(offset, size);
|
|
|
|
|
|
+ unsigned long last_addr = offset + size - 1;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * For P1 and P2 space this is trivial, as everything is already
|
|
|
|
+ * mapped. Uncached access for P1 addresses are done through P2.
|
|
|
|
+ * In the P3 case or for addresses outside of the 29-bit space,
|
|
|
|
+ * mapping must be done by the PMB or by using page tables.
|
|
|
|
+ */
|
|
|
|
+ if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
|
|
|
|
+ if (unlikely(flags & _PAGE_CACHABLE))
|
|
|
|
+ return (void __iomem *)P1SEGADDR(offset);
|
|
|
|
+
|
|
|
|
+ return (void __iomem *)P2SEGADDR(offset);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return __ioremap(offset, size, flags);
|
|
}
|
|
}
|
|
|
|
|
|
-static __inline__ void iounmap(void *addr)
|
|
|
|
-{
|
|
|
|
- return __iounmap(addr);
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-#define ioremap_nocache(off,size) ioremap(off,size)
|
|
|
|
-
|
|
|
|
-static __inline__ int check_signature(unsigned long io_addr,
|
|
|
|
|
|
+#define ioremap(offset, size) \
|
|
|
|
+ __ioremap_mode((offset), (size), 0)
|
|
|
|
+#define ioremap_nocache(offset, size) \
|
|
|
|
+ __ioremap_mode((offset), (size), 0)
|
|
|
|
+#define ioremap_cache(offset, size) \
|
|
|
|
+ __ioremap_mode((offset), (size), _PAGE_CACHABLE)
|
|
|
|
+#define p3_ioremap(offset, size, flags) \
|
|
|
|
+ __ioremap((offset), (size), (flags))
|
|
|
|
+#define iounmap(addr) \
|
|
|
|
+ __iounmap((addr))
|
|
|
|
+
|
|
|
|
+static inline int check_signature(char __iomem *io_addr,
|
|
const unsigned char *signature, int length)
|
|
const unsigned char *signature, int length)
|
|
{
|
|
{
|
|
int retval = 0;
|
|
int retval = 0;
|