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@@ -910,15 +910,9 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
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else
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args.v3.ucLaneNum = 4;
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- if (ASIC_IS_DCE41(rdev)) {
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- args.v3.acConfig.ucEncoderSel = dig->dig_encoder;
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- if (dig->linkb)
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- args.v3.acConfig.ucLinkSel = 1;
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- } else {
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- if (dig->linkb) {
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- args.v3.acConfig.ucLinkSel = 1;
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- args.v3.acConfig.ucEncoderSel = 1;
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- }
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+ if (dig->linkb) {
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+ args.v3.acConfig.ucLinkSel = 1;
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+ args.v3.acConfig.ucEncoderSel = 1;
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}
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/* Select the PLL for the PHY
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@@ -1535,32 +1529,34 @@ static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder)
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struct radeon_encoder_atom_dig *dig;
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uint32_t dig_enc_in_use = 0;
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- /* on DCE41 and encoder can driver any phy so just crtc id */
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- if (ASIC_IS_DCE41(rdev)) {
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- return radeon_crtc->crtc_id;
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- }
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-
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if (ASIC_IS_DCE4(rdev)) {
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dig = radeon_encoder->enc_priv;
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- switch (radeon_encoder->encoder_id) {
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- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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+ if (ASIC_IS_DCE41(rdev)) {
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if (dig->linkb)
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return 1;
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else
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return 0;
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- break;
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- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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- if (dig->linkb)
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- return 3;
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- else
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- return 2;
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- break;
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- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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- if (dig->linkb)
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- return 5;
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- else
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- return 4;
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- break;
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+ } else {
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+ switch (radeon_encoder->encoder_id) {
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+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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+ if (dig->linkb)
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+ return 1;
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+ else
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+ return 0;
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+ break;
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+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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+ if (dig->linkb)
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+ return 3;
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+ else
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+ return 2;
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+ break;
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+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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+ if (dig->linkb)
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+ return 5;
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+ else
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+ return 4;
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+ break;
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+ }
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}
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}
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