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@@ -2786,9 +2786,9 @@ int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
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}
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}
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/**
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/**
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- * sata_std_hardreset - reset host port via SATA phy reset
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+ * sata_port_hardreset - reset port via SATA phy reset
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* @ap: port to reset
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* @ap: port to reset
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- * @class: resulting class of attached device
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+ * @timing: timing parameters { interval, duratinon, timeout } in msec
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*
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*
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* SATA phy-reset host port using DET bits of SControl register.
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* SATA phy-reset host port using DET bits of SControl register.
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*
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*
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@@ -2798,10 +2798,8 @@ int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
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* RETURNS:
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* RETURNS:
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* 0 on success, -errno otherwise.
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* 0 on success, -errno otherwise.
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*/
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*/
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-int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
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+int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
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{
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{
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- struct ata_eh_context *ehc = &ap->eh_context;
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- const unsigned long *timing = sata_ehc_deb_timing(ehc);
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u32 scontrol;
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u32 scontrol;
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int rc;
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int rc;
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@@ -2814,24 +2812,24 @@ int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
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* and Sil3124.
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* and Sil3124.
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*/
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*/
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if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
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if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
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- return rc;
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+ goto out;
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scontrol = (scontrol & 0x0f0) | 0x304;
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scontrol = (scontrol & 0x0f0) | 0x304;
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if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
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if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
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- return rc;
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+ goto out;
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sata_set_spd(ap);
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sata_set_spd(ap);
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}
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}
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/* issue phy wake/reset */
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/* issue phy wake/reset */
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if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
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if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
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- return rc;
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+ goto out;
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scontrol = (scontrol & 0x0f0) | 0x301;
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scontrol = (scontrol & 0x0f0) | 0x301;
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if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
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if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
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- return rc;
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+ goto out;
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/* Couldn't find anything in SATA I/II specs, but AHCI-1.1
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/* Couldn't find anything in SATA I/II specs, but AHCI-1.1
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* 10.4.2 says at least 1 ms.
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* 10.4.2 says at least 1 ms.
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@@ -2839,7 +2837,40 @@ int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
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msleep(1);
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msleep(1);
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/* bring phy back */
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/* bring phy back */
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- sata_phy_resume(ap, timing);
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+ rc = sata_phy_resume(ap, timing);
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+ out:
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+ DPRINTK("EXIT, rc=%d\n", rc);
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+ return rc;
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+}
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+
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+/**
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+ * sata_std_hardreset - reset host port via SATA phy reset
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+ * @ap: port to reset
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+ * @class: resulting class of attached device
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+ *
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+ * SATA phy-reset host port using DET bits of SControl register,
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+ * wait for !BSY and classify the attached device.
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+ *
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+ * LOCKING:
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+ * Kernel thread context (may sleep)
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+ *
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+ * RETURNS:
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+ * 0 on success, -errno otherwise.
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+ */
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+int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
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+{
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+ const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
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+ int rc;
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+
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+ DPRINTK("ENTER\n");
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+
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+ /* do hardreset */
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+ rc = sata_port_hardreset(ap, timing);
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+ if (rc) {
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+ ata_port_printk(ap, KERN_ERR,
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+ "COMRESET failed (errno=%d)\n", rc);
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+ return rc;
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+ }
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/* TODO: phy layer with polling, timeouts, etc. */
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/* TODO: phy layer with polling, timeouts, etc. */
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if (ata_port_offline(ap)) {
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if (ata_port_offline(ap)) {
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@@ -6159,6 +6190,7 @@ EXPORT_SYMBOL_GPL(__sata_phy_reset);
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EXPORT_SYMBOL_GPL(ata_bus_reset);
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EXPORT_SYMBOL_GPL(ata_bus_reset);
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EXPORT_SYMBOL_GPL(ata_std_prereset);
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EXPORT_SYMBOL_GPL(ata_std_prereset);
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EXPORT_SYMBOL_GPL(ata_std_softreset);
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EXPORT_SYMBOL_GPL(ata_std_softreset);
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+EXPORT_SYMBOL_GPL(sata_port_hardreset);
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EXPORT_SYMBOL_GPL(sata_std_hardreset);
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EXPORT_SYMBOL_GPL(sata_std_hardreset);
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EXPORT_SYMBOL_GPL(ata_std_postreset);
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EXPORT_SYMBOL_GPL(ata_std_postreset);
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EXPORT_SYMBOL_GPL(ata_dev_classify);
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EXPORT_SYMBOL_GPL(ata_dev_classify);
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