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@@ -57,15 +57,6 @@ LIST_HEAD(iSeries_Global_Device_List);
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static int DeviceCount;
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-/* Counters and control flags. */
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-static long Pci_Io_Read_Count;
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-static long Pci_Io_Write_Count;
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-#if 0
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-static long Pci_Cfg_Read_Count;
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-static long Pci_Cfg_Write_Count;
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-#endif
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-static long Pci_Error_Count;
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-
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static int Pci_Retry_Max = 3; /* Only retry 3 times */
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static int Pci_Error_Flag = 1; /* Set Retry Error on. */
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@@ -79,40 +70,18 @@ static struct pci_ops iSeries_pci_ops;
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#define IOMM_TABLE_ENTRY_SIZE 0x0000000000400000UL
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#define BASE_IO_MEMORY 0xE000000000000000UL
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-static unsigned long max_io_memory = 0xE000000000000000UL;
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+static unsigned long max_io_memory = BASE_IO_MEMORY;
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static long current_iomm_table_entry;
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/*
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* Lookup Tables.
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*/
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-static struct device_node **iomm_table;
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-static u8 *iobar_table;
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+static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
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+static u8 iobar_table[IOMM_TABLE_MAX_ENTRIES];
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-/*
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- * Static and Global variables
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- */
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-static char *pci_io_text = "iSeries PCI I/O";
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+static const char pci_io_text[] = "iSeries PCI I/O";
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static DEFINE_SPINLOCK(iomm_table_lock);
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-/*
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- * iomm_table_initialize
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- *
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- * Allocates and initalizes the Address Translation Table and Bar
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- * Tables to get them ready for use. Must be called before any
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- * I/O space is handed out to the device BARs.
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- */
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-static void iomm_table_initialize(void)
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-{
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- spin_lock(&iomm_table_lock);
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- iomm_table = kmalloc(sizeof(*iomm_table) * IOMM_TABLE_MAX_ENTRIES,
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- GFP_KERNEL);
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- iobar_table = kmalloc(sizeof(*iobar_table) * IOMM_TABLE_MAX_ENTRIES,
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- GFP_KERNEL);
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- spin_unlock(&iomm_table_lock);
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- if ((iomm_table == NULL) || (iobar_table == NULL))
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- panic("PCI: I/O tables allocation failed.\n");
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-}
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-
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/*
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* iomm_table_allocate_entry
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*
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@@ -140,9 +109,8 @@ static void iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
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*/
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spin_lock(&iomm_table_lock);
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bar_res->name = pci_io_text;
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- bar_res->start =
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+ bar_res->start = BASE_IO_MEMORY +
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IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
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- bar_res->start += BASE_IO_MEMORY;
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bar_res->end = bar_res->start + bar_size - 1;
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/*
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* Allocate the number of table entries needed for BAR.
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@@ -154,7 +122,7 @@ static void iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
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++current_iomm_table_entry;
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}
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max_io_memory = BASE_IO_MEMORY +
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- (IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry);
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+ IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
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spin_unlock(&iomm_table_lock);
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}
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@@ -171,13 +139,10 @@ static void iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
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*/
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static void allocate_device_bars(struct pci_dev *dev)
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{
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- struct resource *bar_res;
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int bar_num;
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- for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num) {
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- bar_res = &dev->resource[bar_num];
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+ for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num)
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iomm_table_allocate_entry(dev, bar_num);
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- }
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}
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/*
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@@ -205,10 +170,9 @@ static struct device_node *build_device_node(HvBusNumber Bus,
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struct device_node *node;
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struct pci_dn *pdn;
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- node = kmalloc(sizeof(struct device_node), GFP_KERNEL);
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+ node = kzalloc(sizeof(struct device_node), GFP_KERNEL);
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if (node == NULL)
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return NULL;
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- memset(node, 0, sizeof(struct device_node));
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pdn = kzalloc(sizeof(*pdn), GFP_KERNEL);
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if (pdn == NULL) {
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kfree(node);
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@@ -224,7 +188,7 @@ static struct device_node *build_device_node(HvBusNumber Bus,
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}
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/*
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- * unsigned long __init find_and_init_phbs(void)
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+ * iSeries_pcibios_init
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*
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* Description:
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* This function checks for all possible system PCI host bridges that connect
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@@ -232,7 +196,7 @@ static struct device_node *build_device_node(HvBusNumber Bus,
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* ownership status. A pci_controller is built for any bus which is partially
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* owned or fully owned by this guest partition.
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*/
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-unsigned long __init find_and_init_phbs(void)
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+void iSeries_pcibios_init(void)
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{
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struct pci_controller *phb;
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HvBusNumber bus;
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@@ -263,18 +227,6 @@ unsigned long __init find_and_init_phbs(void)
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printk(KERN_ERR "Unexpected Return on Probe(0x%04X): 0x%04X",
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bus, ret);
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}
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- return 0;
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-}
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-
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-/*
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- * iSeries_pcibios_init
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- *
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- * Chance to initialize and structures or variable before PCI Bus walk.
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- */
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-void iSeries_pcibios_init(void)
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-{
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- iomm_table_initialize();
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- find_and_init_phbs();
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}
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/*
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@@ -331,8 +283,7 @@ static void scan_PHB_slots(struct pci_controller *Phb)
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int IdSel;
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const int MaxAgents = 8;
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- DevInfo = (struct HvCallPci_DeviceInfo*)
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- kmalloc(sizeof(struct HvCallPci_DeviceInfo), GFP_KERNEL);
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+ DevInfo = kmalloc(sizeof(struct HvCallPci_DeviceInfo), GFP_KERNEL);
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if (DevInfo == NULL)
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return;
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@@ -622,7 +573,6 @@ static int CheckReturnCode(char *TextHdr, struct device_node *DevNode,
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if (ret != 0) {
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struct pci_dn *pdn = PCI_DN(DevNode);
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- ++Pci_Error_Count;
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(*retry)++;
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printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
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TextHdr, pdn->busno, pdn->devfn,
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@@ -704,7 +654,6 @@ u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
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return 0xff;
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}
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do {
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- ++Pci_Io_Read_Count;
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HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, BarOffset, 0);
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} while (CheckReturnCode("RDB", DevNode, &retry, ret.rc) != 0);
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@@ -734,7 +683,6 @@ u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
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return 0xffff;
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}
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do {
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- ++Pci_Io_Read_Count;
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HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
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BarOffset, 0);
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} while (CheckReturnCode("RDW", DevNode, &retry, ret.rc) != 0);
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@@ -765,7 +713,6 @@ u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
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return 0xffffffff;
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}
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do {
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- ++Pci_Io_Read_Count;
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HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
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BarOffset, 0);
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} while (CheckReturnCode("RDL", DevNode, &retry, ret.rc) != 0);
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@@ -803,7 +750,6 @@ void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
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return;
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}
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do {
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- ++Pci_Io_Write_Count;
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rc = HvCall4(HvCallPciBarStore8, dsa, BarOffset, data, 0);
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} while (CheckReturnCode("WWB", DevNode, &retry, rc) != 0);
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}
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@@ -831,7 +777,6 @@ void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
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return;
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}
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do {
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- ++Pci_Io_Write_Count;
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rc = HvCall4(HvCallPciBarStore16, dsa, BarOffset, swab16(data), 0);
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} while (CheckReturnCode("WWW", DevNode, &retry, rc) != 0);
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}
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@@ -859,7 +804,6 @@ void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
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return;
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}
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do {
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- ++Pci_Io_Write_Count;
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rc = HvCall4(HvCallPciBarStore32, dsa, BarOffset, swab32(data), 0);
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} while (CheckReturnCode("WWL", DevNode, &retry, rc) != 0);
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}
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