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@@ -750,6 +750,9 @@ int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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mci_hw->bt_state = MCI_BT_AWAKE;
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+ REG_CLR_BIT(ah, AR_PHY_TIMING4,
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+ 1 << AR_PHY_TIMING_CONTROL4_DO_GAIN_DC_IQ_CAL_SHIFT);
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+
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if (caldata) {
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caldata->done_txiqcal_once = false;
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caldata->done_txclcal_once = false;
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@@ -759,6 +762,9 @@ int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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if (!ath9k_hw_init_cal(ah, chan))
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return -EIO;
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+ REG_SET_BIT(ah, AR_PHY_TIMING4,
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+ 1 << AR_PHY_TIMING_CONTROL4_DO_GAIN_DC_IQ_CAL_SHIFT);
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+
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exit:
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ar9003_mci_enable_interrupt(ah);
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return 0;
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