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@@ -242,26 +242,27 @@ static int lp_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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return irq_create_mapping(lg->domain, offset);
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}
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-static void lp_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
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+static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc)
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{
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struct irq_data *data = irq_desc_get_irq_data(desc);
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struct lp_gpio *lg = irq_data_get_irq_handler_data(data);
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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u32 base, pin, mask;
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unsigned long reg, pending;
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- unsigned virq;
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/* check from GPIO controller which pin triggered the interrupt */
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for (base = 0; base < lg->chip.ngpio; base += 32) {
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reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
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while ((pending = inl(reg))) {
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+ unsigned irq;
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+
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pin = __ffs(pending);
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mask = BIT(pin);
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/* Clear before handling so we don't lose an edge */
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outl(mask, reg);
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- virq = irq_find_mapping(lg->domain, base + pin);
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- generic_handle_irq(virq);
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+ irq = irq_find_mapping(lg->domain, base + pin);
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+ generic_handle_irq(irq);
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}
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}
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chip->irq_eoi(data);
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@@ -324,15 +325,15 @@ static void lp_gpio_irq_init_hw(struct lp_gpio *lg)
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}
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}
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-static int lp_gpio_irq_map(struct irq_domain *d, unsigned int virq,
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- irq_hw_number_t hw)
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+static int lp_gpio_irq_map(struct irq_domain *d, unsigned int irq,
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+ irq_hw_number_t hwirq)
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{
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struct lp_gpio *lg = d->host_data;
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- irq_set_chip_and_handler_name(virq, &lp_irqchip, handle_simple_irq,
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+ irq_set_chip_and_handler_name(irq, &lp_irqchip, handle_simple_irq,
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"demux");
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- irq_set_chip_data(virq, lg);
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- irq_set_irq_type(virq, IRQ_TYPE_NONE);
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+ irq_set_chip_data(irq, lg);
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+ irq_set_irq_type(irq, IRQ_TYPE_NONE);
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return 0;
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}
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