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@@ -4382,6 +4382,40 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv)
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intel_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
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}
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+static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
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+ struct intel_link_m_n *m_n)
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+{
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+ struct drm_device *dev = crtc->base.dev;
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ int pipe = crtc->pipe;
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+
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+ I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
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+ I915_WRITE(TRANSDATA_N1(pipe), m_n->gmch_n);
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+ I915_WRITE(TRANSDPLINK_M1(pipe), m_n->link_m);
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+ I915_WRITE(TRANSDPLINK_N1(pipe), m_n->link_n);
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+}
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+
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+static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
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+ struct intel_link_m_n *m_n)
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+{
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+ struct drm_device *dev = crtc->base.dev;
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ int pipe = crtc->pipe;
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+ enum transcoder transcoder = crtc->config.cpu_transcoder;
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+
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+ if (INTEL_INFO(dev)->gen >= 5) {
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+ I915_WRITE(PIPE_DATA_M1(transcoder), TU_SIZE(m_n->tu) | m_n->gmch_m);
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+ I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n);
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+ I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);
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+ I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);
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+ } else {
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+ I915_WRITE(PIPE_GMCH_DATA_M(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
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+ I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n->gmch_n);
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+ I915_WRITE(PIPE_DP_LINK_M(pipe), m_n->link_m);
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+ I915_WRITE(PIPE_DP_LINK_N(pipe), m_n->link_n);
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+ }
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+}
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+
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static void intel_dp_set_m_n(struct intel_crtc *crtc)
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{
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if (crtc->config.has_pch_encoder)
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@@ -5606,40 +5640,6 @@ int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp)
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return bps / (link_bw * 8) + 1;
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}
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-void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
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- struct intel_link_m_n *m_n)
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-{
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- struct drm_device *dev = crtc->base.dev;
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- struct drm_i915_private *dev_priv = dev->dev_private;
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- int pipe = crtc->pipe;
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-
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- I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
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- I915_WRITE(TRANSDATA_N1(pipe), m_n->gmch_n);
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- I915_WRITE(TRANSDPLINK_M1(pipe), m_n->link_m);
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- I915_WRITE(TRANSDPLINK_N1(pipe), m_n->link_n);
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-}
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-
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-void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
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- struct intel_link_m_n *m_n)
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-{
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- struct drm_device *dev = crtc->base.dev;
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- struct drm_i915_private *dev_priv = dev->dev_private;
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- int pipe = crtc->pipe;
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- enum transcoder transcoder = crtc->config.cpu_transcoder;
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-
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- if (INTEL_INFO(dev)->gen >= 5) {
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- I915_WRITE(PIPE_DATA_M1(transcoder), TU_SIZE(m_n->tu) | m_n->gmch_m);
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- I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n);
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- I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);
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- I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);
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- } else {
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- I915_WRITE(PIPE_GMCH_DATA_M(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
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- I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n->gmch_n);
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- I915_WRITE(PIPE_DP_LINK_M(pipe), m_n->link_m);
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- I915_WRITE(PIPE_DP_LINK_N(pipe), m_n->link_n);
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- }
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-}
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-
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static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor)
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{
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return i9xx_dpll_compute_m(dpll) < factor * dpll->n;
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