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@@ -1485,7 +1485,7 @@ err:
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static int stv090x_get_agc2_min_level(struct stv090x_state *state)
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{
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- u32 agc2_min = 0, agc2 = 0, freq_init, freq_step, reg;
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+ u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
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s32 i, j, steps, dir;
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if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
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@@ -1536,13 +1536,14 @@ static int stv090x_get_agc2_min_level(struct stv090x_state *state)
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if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
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goto err;
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msleep(10);
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+
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+ agc2 = 0;
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for (j = 0; j < 10; j++) {
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- agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
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- agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
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+ agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
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+ STV090x_READ_DEMOD(state, AGC2I0);
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}
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agc2 /= 10;
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- agc2_min = 0xffff;
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- if (agc2 < 0xffff)
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+ if (agc2 < agc2_min)
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agc2_min = agc2;
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}
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@@ -1584,6 +1585,12 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
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int tmg_lock = 0, i;
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s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
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u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
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+ u32 agc2th;
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+
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+ if (state->dev_ver >= 0x30)
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+ agc2th = 0x2e00;
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+ else
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+ agc2th = 0x1f00;
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reg = STV090x_READ_DEMOD(state, DMDISTATE);
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STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
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@@ -1611,7 +1618,7 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
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goto err;
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if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
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goto err;
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- if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0)
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+ if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
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goto err;
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if (state->dev_ver >= 0x30) {
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@@ -1661,14 +1668,15 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
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reg = STV090x_READ_DEMOD(state, DSTATUS);
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if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
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tmg_cpt++;
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- agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
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- agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
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+ agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
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+ STV090x_READ_DEMOD(state, AGC2I0);
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}
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agc2 /= 10;
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srate_coarse = stv090x_get_srate(state, state->mclk);
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cur_step++;
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dir *= -1;
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- if ((tmg_cpt >= 5) && (agc2 < 0x1f00) && (srate_coarse < 55000000) && (srate_coarse > 850000))
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+ if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
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+ (srate_coarse < 50000000) && (srate_coarse > 850000))
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tmg_lock = 1;
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else if (cur_step < steps) {
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if (dir > 0)
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@@ -1751,6 +1759,9 @@ static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
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if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
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goto err;
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+ if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
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+ goto err;
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+
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if (state->dev_ver >= 0x30) {
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if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
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goto err;
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@@ -1908,8 +1919,8 @@ static int stv090x_blind_search(struct stv090x_state *state)
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cpt_fail = 0;
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agc2_ovflw = 0;
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for (i = 0; i < 10; i++) {
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- agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
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- agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
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+ agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
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+ STV090x_READ_DEMOD(state, AGC2I0);
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if (agc2 >= 0xff00)
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agc2_ovflw++;
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reg = STV090x_READ_DEMOD(state, DSTATUS2);
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