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@@ -250,13 +250,6 @@
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/* Proprietary Latency Tolerance Reporting PCI Capability */
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#define E1000_PCI_LTR_CAP_LPT 0xA8
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-/* OBFF Control & Threshold Defines */
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-#define E1000_SVCR_OFF_EN 0x00000001
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-#define E1000_SVCR_OFF_MASKINT 0x00001000
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-#define E1000_SVCR_OFF_TIMER_MASK 0xFFFF0000
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-#define E1000_SVCR_OFF_TIMER_SHIFT 16
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-#define E1000_SVT_OFF_HWM_MASK 0x0000001F
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-
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void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
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void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
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bool state);
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