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@@ -452,6 +452,7 @@ int t3_mac_enable(struct cmac *mac, int which)
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A_XGM_TX_SPI4_SOP_EOP_CNT +
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A_XGM_TX_SPI4_SOP_EOP_CNT +
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oft)));
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oft)));
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mac->rx_mcnt = s->rx_frames;
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mac->rx_mcnt = s->rx_frames;
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+ mac->rx_pause = s->rx_pause;
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mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
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mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
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A_XGM_RX_SPI4_SOP_EOP_CNT +
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A_XGM_RX_SPI4_SOP_EOP_CNT +
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oft)));
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oft)));
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@@ -504,7 +505,7 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
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tx_xcnt = 1; /* By default tx_xcnt is making progress */
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tx_xcnt = 1; /* By default tx_xcnt is making progress */
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tx_tcnt = mac->tx_tcnt; /* If tx_mcnt is progressing ignore tx_tcnt */
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tx_tcnt = mac->tx_tcnt; /* If tx_mcnt is progressing ignore tx_tcnt */
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rx_xcnt = 1; /* By default rx_xcnt is making progress */
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rx_xcnt = 1; /* By default rx_xcnt is making progress */
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- if (tx_mcnt == mac->tx_mcnt) {
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+ if (tx_mcnt == mac->tx_mcnt && mac->rx_pause == s->rx_pause) {
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tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
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tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
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A_XGM_TX_SPI4_SOP_EOP_CNT +
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A_XGM_TX_SPI4_SOP_EOP_CNT +
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mac->offset)));
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mac->offset)));
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@@ -560,6 +561,7 @@ out:
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mac->tx_mcnt = s->tx_frames;
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mac->tx_mcnt = s->tx_frames;
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mac->rx_xcnt = rx_xcnt;
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mac->rx_xcnt = rx_xcnt;
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mac->rx_mcnt = s->rx_frames;
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mac->rx_mcnt = s->rx_frames;
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+ mac->rx_pause = s->rx_pause;
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if (status == 1) {
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if (status == 1) {
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t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
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t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
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t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */
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t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */
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