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@@ -36,13 +36,6 @@
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.global nand_boot
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.global swapper_pg_dir
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- ;; Dummy section to make it bootable with current VCS simulator
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-#ifdef CONFIG_ETRAX_VCS_SIM
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- .section ".boot", "ax"
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- ba tstart
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- nop
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-#endif
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-
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.text
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tstart:
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;; This is the entry point of the kernel. The CPU is currently in
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@@ -75,17 +68,10 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
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-#elif !defined(CONFIG_ETRAX_VCS_SIM)
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- move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
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- | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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- | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
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#else
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- ;; Map the virtual DRAM to the RW eprom area at address 0.
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- ;; Also map 0xa for the hook calls,
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move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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- | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \
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- | REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0
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+ | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
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#endif
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;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
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@@ -126,27 +112,6 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
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| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
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-#elif !defined(CONFIG_ETRAX_VCS_SIM)
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- move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
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- | REG_STATE(mmu, rw_mm_cfg, acc, on) \
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- | REG_STATE(mmu, rw_mm_cfg, ex, on) \
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- | REG_STATE(mmu, rw_mm_cfg, inv, on) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_f, linear) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_e, linear) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
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#else
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move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
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| REG_STATE(mmu, rw_mm_cfg, acc, on) \
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@@ -157,7 +122,7 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
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| REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
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- | REG_STATE(mmu, rw_mm_cfg, seg_a, linear) \
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+ | REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
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@@ -226,7 +191,6 @@ master_cpu:
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move.d secondary_cpu_entry, $r1
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move.d $r1, [$r0]
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#endif
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-#ifndef CONFIG_ETRAX_VCS_SIM
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; Check if starting from DRAM (network->RAM boot or unpacked
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; compressed kernel), or directly from flash.
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lapcq ., $r0
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@@ -234,7 +198,6 @@ master_cpu:
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cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
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blo _inflash0
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nop
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-#endif
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jump _inram ; Jump to cached RAM.
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nop
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@@ -326,7 +289,6 @@ move_cramfs:
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move.d romfs_length, $r1
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move.d $r0, [$r1]
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-#ifndef CONFIG_ETRAX_VCS_SIM
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;; The kernel could have been unpacked to DRAM by the loader, but
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;; the cramfs image could still be in the flash immediately
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;; following the compressed kernel image. The loader passes the address
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@@ -335,10 +297,6 @@ move_cramfs:
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cmp.d 0x0ffffff8, $r9
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bhs _no_romfs_in_flash ; R9 points outside the flash area.
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nop
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-#else
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- ba _no_romfs_in_flash
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- nop
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-#endif
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;; cramfs rootfs might to be in flash. Check for it.
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move.d [$r9], $r0 ; cramfs_super.magic
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cmp.d CRAMFS_MAGIC, $r0
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@@ -396,7 +354,6 @@ _no_romfs_in_flash:
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move.d romfs_length, $r3
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move.d $r2, [$r3] ; store size at romfs_length
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-#ifndef CONFIG_ETRAX_VCS_SIM
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add.d $r2, $r0 ; copy from end and downwards
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add.d $r2, $r1
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@@ -410,7 +367,6 @@ _no_romfs_in_flash:
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subq 1, $r2
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bne 1b
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nop
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-#endif
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4:
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;; BSS move done.
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@@ -455,7 +411,6 @@ no_command_line:
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move.d etrax_irv, $r1 ; Set the exception base register and pointer.
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move.d $r0, [$r1]
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-#ifndef CONFIG_ETRAX_VCS_SIM
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;; Clear the BSS region from _bss_start to _end.
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move.d __bss_start, $r0
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move.d _end, $r1
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@@ -463,15 +418,6 @@ no_command_line:
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cmp.d $r1, $r0
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blo 1b
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nop
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-#endif
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-
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-#ifdef CONFIG_ETRAX_VCS_SIM
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- /* Set the watchdog timeout to something big. Will be removed when */
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- /* watchdog can be disabled with command line option */
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- move.d 0x7fffffff, $r10
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- jsr CPU_WATCHDOG_TIMEOUT
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- nop
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-#endif
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; Initialize registers to increase determinism
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move.d __bss_start, $r0
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