|
@@ -23,6 +23,7 @@
|
|
|
#define PPC_FEATURE_SMT 0x00004000
|
|
|
#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
|
|
|
#define PPC_FEATURE_ARCH_2_05 0x00001000
|
|
|
+#define PPC_FEATURE_PA6T 0x00000800
|
|
|
|
|
|
#define PPC_FEATURE_TRUE_LE 0x00000002
|
|
|
#define PPC_FEATURE_PPC_LE 0x00000001
|
|
@@ -332,6 +333,10 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
|
|
|
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
|
|
|
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
|
|
|
CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
|
|
|
+#define CPU_FTRS_PA6T (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
|
|
|
+ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
|
|
|
+ CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
|
|
|
+ CPU_FTR_PURR | CPU_FTR_REAL_LE)
|
|
|
#define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
|
|
|
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
|
|
|
#endif
|
|
@@ -340,7 +345,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
|
|
|
#define CPU_FTRS_POSSIBLE \
|
|
|
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
|
|
|
CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
|
|
|
- CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE)
|
|
|
+ CPU_FTRS_CELL | CPU_FTRS_PA6T)
|
|
|
#else
|
|
|
enum {
|
|
|
CPU_FTRS_POSSIBLE =
|
|
@@ -379,7 +384,7 @@ enum {
|
|
|
#define CPU_FTRS_ALWAYS \
|
|
|
(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
|
|
|
CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
|
|
|
- CPU_FTRS_CELL & CPU_FTRS_POSSIBLE)
|
|
|
+ CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
|
|
|
#else
|
|
|
enum {
|
|
|
CPU_FTRS_ALWAYS =
|