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@@ -51,7 +51,7 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
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* These indirect registers work with busy bits,
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* and we will try maximal REGISTER_BUSY_COUNT times to access
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* the register while taking a REGISTER_BUSY_DELAY us delay
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- * between each attampt. When the busy bit is still set at that time,
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+ * between each attempt. When the busy bit is still set at that time,
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* the access attempt is considered to have failed,
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* and we will print an error.
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*/
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@@ -386,7 +386,7 @@ static int rt61pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
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* The driver does not support the IV/EIV generation
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* in hardware. However it doesn't support the IV/EIV
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* inside the ieee80211 frame either, but requires it
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- * to be provided seperately for the descriptor.
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+ * to be provided separately for the descriptor.
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* rt2x00lib will cut the IV/EIV data out of all frames
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* given to us by mac80211, but we must tell mac80211
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* to generate the IV/EIV data.
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@@ -397,7 +397,7 @@ static int rt61pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
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/*
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* SEC_CSR0 contains only single-bit fields to indicate
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* a particular key is valid. Because using the FIELD32()
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- * defines directly will cause a lot of overhead we use
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+ * defines directly will cause a lot of overhead, we use
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* a calculation to determine the correct bit directly.
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*/
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mask = 1 << key->hw_key_idx;
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@@ -425,11 +425,11 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
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/*
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* rt2x00lib can't determine the correct free
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* key_idx for pairwise keys. We have 2 registers
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- * with key valid bits. The goal is simple, read
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- * the first register, if that is full move to
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+ * with key valid bits. The goal is simple: read
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+ * the first register. If that is full, move to
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* the next register.
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- * When both registers are full, we drop the key,
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- * otherwise we use the first invalid entry.
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+ * When both registers are full, we drop the key.
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+ * Otherwise, we use the first invalid entry.
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*/
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rt2x00pci_register_read(rt2x00dev, SEC_CSR2, ®);
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if (reg && reg == ~0) {
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@@ -464,8 +464,8 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
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&addr_entry, sizeof(addr_entry));
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/*
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- * Enable pairwise lookup table for given BSS idx,
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- * without this received frames will not be decrypted
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+ * Enable pairwise lookup table for given BSS idx.
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+ * Without this, received frames will not be decrypted
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* by the hardware.
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*/
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rt2x00pci_register_read(rt2x00dev, SEC_CSR4, ®);
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@@ -487,7 +487,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
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/*
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* SEC_CSR2 and SEC_CSR3 contain only single-bit fields to indicate
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* a particular key is valid. Because using the FIELD32()
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- * defines directly will cause a lot of overhead we use
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+ * defines directly will cause a lot of overhead, we use
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* a calculation to determine the correct bit directly.
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*/
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if (key->hw_key_idx < 32) {
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@@ -556,7 +556,7 @@ static void rt61pci_config_intf(struct rt2x00_dev *rt2x00dev,
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if (flags & CONFIG_UPDATE_TYPE) {
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/*
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* Clear current synchronisation setup.
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- * For the Beacon base registers we only need to clear
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+ * For the Beacon base registers, we only need to clear
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* the first byte since that byte contains the VALID and OWNER
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* bits which (when set to 0) will invalidate the entire beacon.
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*/
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@@ -1168,8 +1168,8 @@ static int rt61pci_check_firmware(struct rt2x00_dev *rt2x00dev,
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return FW_BAD_LENGTH;
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/*
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- * The last 2 bytes in the firmware array are the crc checksum itself,
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- * this means that we should never pass those 2 bytes to the crc
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+ * The last 2 bytes in the firmware array are the crc checksum itself.
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+ * This means that we should never pass those 2 bytes to the crc
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* algorithm.
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*/
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fw_crc = (data[len - 2] << 8 | data[len - 1]);
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@@ -1986,7 +1986,7 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry,
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/*
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* Hardware has stripped IV/EIV data from 802.11 frame during
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- * decryption. It has provided the data seperately but rt2x00lib
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+ * decryption. It has provided the data separately but rt2x00lib
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* should decide if it should be reinserted.
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*/
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rxdesc->flags |= RX_FLAG_IV_STRIPPED;
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@@ -2042,7 +2042,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
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* During each loop we will compare the freshly read
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* STA_CSR4 register value with the value read from
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* the previous loop. If the 2 values are equal then
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- * we should stop processing because the chance it
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+ * we should stop processing because the chance is
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* quite big that the device has been unplugged and
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* we risk going into an endless loop.
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*/
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@@ -2330,7 +2330,7 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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__set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
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/*
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- * Detect if this device has an hardware controlled radio.
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+ * Detect if this device has a hardware controlled radio.
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*/
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if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
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__set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
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@@ -2355,7 +2355,7 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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__set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
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/*
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- * When working with a RF2529 chip without double antenna
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+ * When working with a RF2529 chip without double antenna,
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* the antenna settings should be gathered from the NIC
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* eeprom word.
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*/
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@@ -2668,7 +2668,7 @@ static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
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/*
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* We only need to perform additional register initialization
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- * for WMM queues/
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+ * for WMM queues.
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*/
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if (queue_idx >= 4)
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return 0;
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