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@@ -34,9 +34,9 @@
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#define AU1000_PCMCIA_IO_SPEED (255)
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#define AU1000_PCMCIA_MEM_SPEED (300)
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-#define AU1X_SOCK0_IO 0xF00000000
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-#define AU1X_SOCK0_PHYS_ATTR 0xF40000000
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-#define AU1X_SOCK0_PHYS_MEM 0xF80000000
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+#define AU1X_SOCK0_IO 0xF00000000ULL
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+#define AU1X_SOCK0_PHYS_ATTR 0xF40000000ULL
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+#define AU1X_SOCK0_PHYS_MEM 0xF80000000ULL
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/* pseudo 32 bit phys addresses, which get fixed up to the
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* real 36 bit address in fixup_bigphys_addr() */
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#define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000
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@@ -45,16 +45,20 @@
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/* pcmcia socket 1 needs external glue logic so the memory map
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* differs from board to board.
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*/
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-#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_PB1200)
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-#define AU1X_SOCK1_IO 0xF08000000
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-#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
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-#define AU1X_SOCK1_PHYS_MEM 0xF88000000
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+#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || \
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+ defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || \
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+ defined(CONFIG_MIPS_PB1200)
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+#define AU1X_SOCK1_IO 0xF08000000ULL
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+#define AU1X_SOCK1_PHYS_ATTR 0xF48000000ULL
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+#define AU1X_SOCK1_PHYS_MEM 0xF88000000ULL
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#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
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#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000
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-#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || defined(CONFIG_MIPS_DB1200)
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-#define AU1X_SOCK1_IO 0xF04000000
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-#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
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-#define AU1X_SOCK1_PHYS_MEM 0xF84000000
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+#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \
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+ defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || \
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+ defined(CONFIG_MIPS_DB1200)
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+#define AU1X_SOCK1_IO 0xF04000000ULL
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+#define AU1X_SOCK1_PHYS_ATTR 0xF44000000ULL
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+#define AU1X_SOCK1_PHYS_MEM 0xF84000000ULL
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#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000
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#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8400000
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#endif
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