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@@ -842,29 +842,6 @@ void ai_pci_down(struct si_pub *sih)
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pcicore_down(sii->pch, SI_PCIDOWN);
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}
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-/*
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- * Configure the pci core for pci client (NIC) action
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- * coremask is the bitvec of cores by index to be enabled.
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- */
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-void ai_pci_setup(struct si_pub *sih, uint coremask)
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-{
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- struct si_info *sii;
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- u32 w;
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-
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- sii = (struct si_info *)sih;
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-
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- /*
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- * Enable sb->pci interrupts. Assume
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- * PCI rev 2.3 support was added in pci core rev 6 and things changed..
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- */
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- if (PCIE(sih)) {
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- /* pci config write to set this core bit in PCIIntMask */
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- pci_read_config_dword(sii->pcibus, PCI_INT_MASK, &w);
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- w |= (coremask << PCI_SBIM_SHIFT);
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- pci_write_config_dword(sii->pcibus, PCI_INT_MASK, w);
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- }
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-}
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-
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/*
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* Fixup SROMless PCI device's configuration.
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* The current core may be changed upon return.
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