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@@ -32,10 +32,6 @@
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# error "No support for kernel preemption currently"
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# error "No support for kernel preemption currently"
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#endif
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#endif
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-#if INT_INTCTRL_K < 32 || INT_INTCTRL_K >= 48
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-# error INT_INTCTRL_K coded to set high interrupt mask
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-#endif
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-
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#define PTREGS_PTR(reg, ptreg) addli reg, sp, C_ABI_SAVE_AREA_SIZE + (ptreg)
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#define PTREGS_PTR(reg, ptreg) addli reg, sp, C_ABI_SAVE_AREA_SIZE + (ptreg)
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#define PTREGS_OFFSET_SYSCALL PTREGS_OFFSET_REG(TREG_SYSCALL_NR)
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#define PTREGS_OFFSET_SYSCALL PTREGS_OFFSET_REG(TREG_SYSCALL_NR)
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@@ -1198,46 +1194,6 @@ STD_ENTRY(interrupt_return)
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STD_ENDPROC(interrupt_return)
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STD_ENDPROC(interrupt_return)
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- /*
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- * This interrupt variant clears the INT_INTCTRL_K interrupt mask bit
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- * before returning, so we can properly get more downcalls.
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- */
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- .pushsection .text.handle_interrupt_downcall,"ax"
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-handle_interrupt_downcall:
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- finish_interrupt_save handle_interrupt_downcall
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- check_single_stepping normal, .Ldispatch_downcall
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-.Ldispatch_downcall:
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-
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- /* Clear INTCTRL_K from the set of interrupts we ever enable. */
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- GET_INTERRUPTS_ENABLED_MASK_PTR(r30)
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- {
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- addi r30, r30, 4
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- movei r31, INT_MASK(INT_INTCTRL_K)
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- }
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- {
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- lw r20, r30
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- nor r21, r31, zero
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- }
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- and r20, r20, r21
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- sw r30, r20
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-
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- {
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- jalr r0
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- PTREGS_PTR(r0, PTREGS_OFFSET_BASE)
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- }
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- FEEDBACK_REENTER(handle_interrupt_downcall)
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-
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- /* Allow INTCTRL_K to be enabled next time we enable interrupts. */
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- lw r20, r30
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- or r20, r20, r31
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- sw r30, r20
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-
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- {
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- movei r30, 0 /* not an NMI */
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- j interrupt_return
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- }
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- STD_ENDPROC(handle_interrupt_downcall)
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-
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/*
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/*
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* Some interrupts don't check for single stepping
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* Some interrupts don't check for single stepping
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*/
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*/
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@@ -2014,17 +1970,17 @@ int_unalign:
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#endif
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#endif
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int_hand INT_INTCTRL_0, INTCTRL_0, bad_intr
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int_hand INT_INTCTRL_0, INTCTRL_0, bad_intr
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int_hand INT_MESSAGE_RCV_DWNCL, MESSAGE_RCV_DWNCL, \
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int_hand INT_MESSAGE_RCV_DWNCL, MESSAGE_RCV_DWNCL, \
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- hv_message_intr, handle_interrupt_downcall
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+ hv_message_intr
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int_hand INT_DEV_INTR_DWNCL, DEV_INTR_DWNCL, \
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int_hand INT_DEV_INTR_DWNCL, DEV_INTR_DWNCL, \
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- tile_dev_intr, handle_interrupt_downcall
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+ tile_dev_intr
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int_hand INT_I_ASID, I_ASID, bad_intr
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int_hand INT_I_ASID, I_ASID, bad_intr
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int_hand INT_D_ASID, D_ASID, bad_intr
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int_hand INT_D_ASID, D_ASID, bad_intr
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int_hand INT_DMATLB_MISS_DWNCL, DMATLB_MISS_DWNCL, \
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int_hand INT_DMATLB_MISS_DWNCL, DMATLB_MISS_DWNCL, \
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- do_page_fault, handle_interrupt_downcall
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+ do_page_fault
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int_hand INT_SNITLB_MISS_DWNCL, SNITLB_MISS_DWNCL, \
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int_hand INT_SNITLB_MISS_DWNCL, SNITLB_MISS_DWNCL, \
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- do_page_fault, handle_interrupt_downcall
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+ do_page_fault
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int_hand INT_DMATLB_ACCESS_DWNCL, DMATLB_ACCESS_DWNCL, \
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int_hand INT_DMATLB_ACCESS_DWNCL, DMATLB_ACCESS_DWNCL, \
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- do_page_fault, handle_interrupt_downcall
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+ do_page_fault
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int_hand INT_SN_CPL, SN_CPL, bad_intr
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int_hand INT_SN_CPL, SN_CPL, bad_intr
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int_hand INT_DOUBLE_FAULT, DOUBLE_FAULT, do_trap
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int_hand INT_DOUBLE_FAULT, DOUBLE_FAULT, do_trap
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#if CHIP_HAS_AUX_PERF_COUNTERS()
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#if CHIP_HAS_AUX_PERF_COUNTERS()
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