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@@ -33,8 +33,6 @@ struct davinci_gpio_regs {
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u32 intstat;
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};
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-static DEFINE_SPINLOCK(gpio_lock);
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-
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#define chip2controller(chip) \
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container_of(chip, struct davinci_gpio_controller, chip)
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@@ -83,10 +81,11 @@ static inline int __davinci_direction(struct gpio_chip *chip,
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{
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struct davinci_gpio_controller *d = chip2controller(chip);
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struct davinci_gpio_regs __iomem *g = d->regs;
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+ unsigned long flags;
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u32 temp;
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u32 mask = 1 << offset;
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- spin_lock(&gpio_lock);
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+ spin_lock_irqsave(&d->lock, flags);
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temp = __raw_readl(&g->dir);
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if (out) {
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temp &= ~mask;
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@@ -95,7 +94,7 @@ static inline int __davinci_direction(struct gpio_chip *chip,
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temp |= mask;
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}
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__raw_writel(temp, &g->dir);
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- spin_unlock(&gpio_lock);
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+ spin_unlock_irqrestore(&d->lock, flags);
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return 0;
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}
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@@ -175,6 +174,8 @@ static int __init davinci_gpio_setup(void)
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if (chips[i].chip.ngpio > 32)
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chips[i].chip.ngpio = 32;
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+ spin_lock_init(&chips[i].lock);
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+
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regs = gpio2regs(base);
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chips[i].regs = regs;
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chips[i].set_data = ®s->set_data;
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