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@@ -7958,6 +7958,7 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
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u32 shmem2_base_path[], u32 chip_id)
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u32 shmem2_base_path[], u32 chip_id)
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{
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{
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u8 rc = 0;
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u8 rc = 0;
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+ u32 phy_ver;
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u8 phy_index;
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u8 phy_index;
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u32 ext_phy_type, ext_phy_config;
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u32 ext_phy_type, ext_phy_config;
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DP(NETIF_MSG_LINK, "Begin common phy init\n");
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DP(NETIF_MSG_LINK, "Begin common phy init\n");
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@@ -7965,6 +7966,16 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
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if (CHIP_REV_IS_EMUL(bp))
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if (CHIP_REV_IS_EMUL(bp))
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return 0;
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return 0;
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+ /* Check if common init was already done */
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+ phy_ver = REG_RD(bp, shmem_base_path[0] +
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+ offsetof(struct shmem_region,
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+ port_mb[PORT_0].ext_phy_fw_version));
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+ if (phy_ver) {
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+ DP(NETIF_MSG_LINK, "Not doing common init; phy ver is 0x%x\n",
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+ phy_ver);
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+ return 0;
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+ }
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+
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/* Read the ext_phy_type for arbitrary port(0) */
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/* Read the ext_phy_type for arbitrary port(0) */
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for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;
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for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;
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phy_index++) {
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phy_index++) {
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