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@@ -90,16 +90,16 @@ static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask,
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{
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{
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int val;
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int val;
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- // read a byte and check
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+ /* read a byte and check */
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val = tda10086_read_byte(state, reg);
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val = tda10086_read_byte(state, reg);
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if (val < 0)
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if (val < 0)
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return val;
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return val;
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- // mask if off
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+ /* mask if off */
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val = val & ~mask;
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val = val & ~mask;
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val |= data & 0xff;
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val |= data & 0xff;
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- // write it out again
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+ /* write it out again */
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return tda10086_write_byte(state, reg, val);
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return tda10086_write_byte(state, reg, val);
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}
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}
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@@ -112,63 +112,63 @@ static int tda10086_init(struct dvb_frontend* fe)
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if (state->config->diseqc_tone)
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if (state->config->diseqc_tone)
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t22k_off = 0;
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t22k_off = 0;
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- // reset
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+ /* reset */
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tda10086_write_byte(state, 0x00, 0x00);
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tda10086_write_byte(state, 0x00, 0x00);
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msleep(10);
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msleep(10);
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- // misc setup
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+ /* misc setup */
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tda10086_write_byte(state, 0x01, 0x94);
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tda10086_write_byte(state, 0x01, 0x94);
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- tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP
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+ tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */
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tda10086_write_byte(state, 0x03, 0xe4);
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tda10086_write_byte(state, 0x03, 0xe4);
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tda10086_write_byte(state, 0x04, 0x43);
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tda10086_write_byte(state, 0x04, 0x43);
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tda10086_write_byte(state, 0x0c, 0x0c);
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tda10086_write_byte(state, 0x0c, 0x0c);
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- tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold
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- tda10086_write_byte(state, 0x20, 0x89); // misc
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- tda10086_write_byte(state, 0x30, 0x04); // acquisition period length
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- tda10086_write_byte(state, 0x32, 0x00); // irq off
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- tda10086_write_byte(state, 0x31, 0x56); // setup AFC
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-
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- // setup PLL (this assumes SACLK = 96MHz)
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- tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup
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+ tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */
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+ tda10086_write_byte(state, 0x20, 0x89); /* misc */
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+ tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */
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+ tda10086_write_byte(state, 0x32, 0x00); /* irq off */
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+ tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */
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+
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+ /* setup PLL (this assumes SACLK = 96MHz) */
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+ tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */
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if (state->config->xtal_freq == TDA10086_XTAL_16M) {
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if (state->config->xtal_freq == TDA10086_XTAL_16M) {
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- tda10086_write_byte(state, 0x3a, 0x0b); // M=12
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- tda10086_write_byte(state, 0x3b, 0x01); // P=2
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+ tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */
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+ tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */
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} else {
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} else {
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- tda10086_write_byte(state, 0x3a, 0x17); // M=24
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- tda10086_write_byte(state, 0x3b, 0x00); // P=1
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+ tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */
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+ tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */
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}
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}
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- tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL
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+ tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */
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- // setup TS interface
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+ /* setup TS interface */
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tda10086_write_byte(state, 0x11, 0x81);
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tda10086_write_byte(state, 0x11, 0x81);
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tda10086_write_byte(state, 0x12, 0x81);
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tda10086_write_byte(state, 0x12, 0x81);
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- tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST
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- tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use
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- tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use
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+ tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */
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+ tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */
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+ tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */
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tda10086_write_byte(state, 0x10, 0x2a);
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tda10086_write_byte(state, 0x10, 0x2a);
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- // setup ADC
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- tda10086_write_byte(state, 0x58, 0x61); // ADC setup
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- tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC
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+ /* setup ADC */
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+ tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */
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+ tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */
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- // setup AGC
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+ /* setup AGC */
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tda10086_write_byte(state, 0x05, 0x0B);
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tda10086_write_byte(state, 0x05, 0x0B);
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tda10086_write_byte(state, 0x37, 0x63);
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tda10086_write_byte(state, 0x37, 0x63);
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- tda10086_write_byte(state, 0x3f, 0x0a); // NOTE: flydvb varies it
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+ tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */
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tda10086_write_byte(state, 0x40, 0x64);
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tda10086_write_byte(state, 0x40, 0x64);
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tda10086_write_byte(state, 0x41, 0x4f);
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tda10086_write_byte(state, 0x41, 0x4f);
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tda10086_write_byte(state, 0x42, 0x43);
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tda10086_write_byte(state, 0x42, 0x43);
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- // setup viterbi
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- tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK
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+ /* setup viterbi */
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+ tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */
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- // setup carrier recovery
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+ /* setup carrier recovery */
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tda10086_write_byte(state, 0x3d, 0x80);
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tda10086_write_byte(state, 0x3d, 0x80);
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- // setup SEC
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- tda10086_write_byte(state, 0x36, t22k_off); // all SEC off, 22k tone
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- tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency
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- tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // }
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+ /* setup SEC */
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+ tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */
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+ tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000)));
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+ tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8);
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return 0;
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return 0;
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}
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}
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@@ -307,7 +307,7 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
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dprintk ("%s %i\n", __func__, symbol_rate);
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dprintk ("%s %i\n", __func__, symbol_rate);
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- // setup the decimation and anti-aliasing filters..
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+ /* setup the decimation and anti-aliasing filters.. */
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if (symbol_rate < (u32) (SACLK * 0.0137)) {
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if (symbol_rate < (u32) (SACLK * 0.0137)) {
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dfn=4;
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dfn=4;
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afs=1;
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afs=1;
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@@ -344,13 +344,13 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
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byp=1;
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byp=1;
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}
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}
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- // calculate BDR
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+ /* calculate BDR */
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big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
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big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
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big += ((SACLK/1000ULL)-1ULL);
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big += ((SACLK/1000ULL)-1ULL);
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do_div(big, (SACLK/1000ULL));
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do_div(big, (SACLK/1000ULL));
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bdr = big & 0xfffff;
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bdr = big & 0xfffff;
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- // calculate BDRI
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+ /* calculate BDRI */
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tmp = (1<<dfn)*(symbol_rate/1000);
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tmp = (1<<dfn)*(symbol_rate/1000);
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bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
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bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
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@@ -419,11 +419,11 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
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dprintk ("%s\n", __func__);
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dprintk ("%s\n", __func__);
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- // modify parameters for tuning
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+ /* modify parameters for tuning */
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tda10086_write_byte(state, 0x02, 0x35);
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tda10086_write_byte(state, 0x02, 0x35);
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state->has_lock = false;
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state->has_lock = false;
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- // set params
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+ /* set params */
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if (fe->ops.tuner_ops.set_params) {
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if (fe->ops.tuner_ops.set_params) {
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fe->ops.tuner_ops.set_params(fe, fe_params);
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fe->ops.tuner_ops.set_params(fe, fe_params);
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if (fe->ops.i2c_gate_ctrl)
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if (fe->ops.i2c_gate_ctrl)
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@@ -435,7 +435,7 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
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fe->ops.i2c_gate_ctrl(fe, 0);
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fe->ops.i2c_gate_ctrl(fe, 0);
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}
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}
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- // calcluate the frequency offset (in *Hz* not kHz)
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+ /* calcluate the frequency offset (in *Hz* not kHz) */
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freqoff = fe_params->frequency - freq;
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freqoff = fe_params->frequency - freq;
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freqoff = ((1<<16) * freqoff) / (SACLK/1000);
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freqoff = ((1<<16) * freqoff) / (SACLK/1000);
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tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
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tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
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@@ -448,7 +448,7 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
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if ((ret = tda10086_set_fec(state, fe_params)) < 0)
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if ((ret = tda10086_set_fec(state, fe_params)) < 0)
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return ret;
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return ret;
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- // soft reset + disable TS output until lock
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+ /* soft reset + disable TS output until lock */
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tda10086_write_mask(state, 0x10, 0x40, 0x40);
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tda10086_write_mask(state, 0x10, 0x40, 0x40);
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tda10086_write_mask(state, 0x00, 0x01, 0x00);
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tda10086_write_mask(state, 0x00, 0x01, 0x00);
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@@ -466,11 +466,11 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
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dprintk ("%s\n", __func__);
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dprintk ("%s\n", __func__);
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- // check for invalid symbol rate
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+ /* check for invalid symbol rate */
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if (fe_params->u.qpsk.symbol_rate < 500000)
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if (fe_params->u.qpsk.symbol_rate < 500000)
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return -EINVAL;
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return -EINVAL;
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- // calculate the updated frequency (note: we convert from Hz->kHz)
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+ /* calculate the updated frequency (note: we convert from Hz->kHz) */
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tmp64 = tda10086_read_byte(state, 0x52);
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tmp64 = tda10086_read_byte(state, 0x52);
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tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
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tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
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if (tmp64 & 0x8000)
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if (tmp64 & 0x8000)
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@@ -479,7 +479,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
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do_div(tmp64, (1ULL<<15) * (1ULL<<1));
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do_div(tmp64, (1ULL<<15) * (1ULL<<1));
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fe_params->frequency = (int) state->frequency + (int) tmp64;
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fe_params->frequency = (int) state->frequency + (int) tmp64;
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- // the inversion
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+ /* the inversion */
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val = tda10086_read_byte(state, 0x0c);
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val = tda10086_read_byte(state, 0x0c);
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if (val & 0x80) {
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if (val & 0x80) {
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switch(val & 0x40) {
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switch(val & 0x40) {
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@@ -510,7 +510,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
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}
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}
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}
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}
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- // calculate the updated symbol rate
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+ /* calculate the updated symbol rate */
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tmp = tda10086_read_byte(state, 0x1d);
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tmp = tda10086_read_byte(state, 0x1d);
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if (tmp & 0x80)
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if (tmp & 0x80)
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tmp |= 0xffffff00;
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tmp |= 0xffffff00;
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@@ -518,7 +518,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
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tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
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tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
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fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
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fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
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- // the FEC
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+ /* the FEC */
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val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
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val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
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switch(val) {
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switch(val) {
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case 0x00:
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case 0x00:
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@@ -571,7 +571,7 @@ static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status)
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*fe_status |= FE_HAS_LOCK;
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*fe_status |= FE_HAS_LOCK;
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if (!state->has_lock) {
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if (!state->has_lock) {
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state->has_lock = true;
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state->has_lock = true;
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- // modify parameters for stable reception
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+ /* modify parameters for stable reception */
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tda10086_write_byte(state, 0x02, 0x00);
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tda10086_write_byte(state, 0x02, 0x00);
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}
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}
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}
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}
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@@ -611,10 +611,10 @@ static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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dprintk ("%s\n", __func__);
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dprintk ("%s\n", __func__);
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- // read it
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+ /* read it */
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*ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
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*ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
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- // reset counter
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+ /* reset counter */
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tda10086_write_byte(state, 0x18, 0x00);
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tda10086_write_byte(state, 0x18, 0x00);
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tda10086_write_byte(state, 0x18, 0x80);
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tda10086_write_byte(state, 0x18, 0x80);
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@@ -627,7 +627,7 @@ static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
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dprintk ("%s\n", __func__);
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dprintk ("%s\n", __func__);
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- // read it
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+ /* read it */
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*ber = 0;
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*ber = 0;
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*ber |= tda10086_read_byte(state, 0x15);
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*ber |= tda10086_read_byte(state, 0x15);
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*ber |= tda10086_read_byte(state, 0x16) << 8;
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*ber |= tda10086_read_byte(state, 0x16) << 8;
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