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+/*
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+ * CPU frequency scaling for OMAP using OPP information
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+ *
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+ * Copyright (C) 2005 Nokia Corporation
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+ * Written by Tony Lindgren <tony@atomide.com>
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+ *
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+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
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+ *
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+ * Copyright (C) 2007-2011 Texas Instruments, Inc.
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+ * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+#include <linux/types.h>
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+#include <linux/kernel.h>
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+#include <linux/sched.h>
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+#include <linux/cpufreq.h>
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+#include <linux/delay.h>
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+#include <linux/init.h>
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+#include <linux/err.h>
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+#include <linux/clk.h>
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+#include <linux/io.h>
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+#include <linux/opp.h>
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+#include <linux/cpu.h>
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+#include <linux/module.h>
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+
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+#include <asm/system.h>
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+#include <asm/smp_plat.h>
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+#include <asm/cpu.h>
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+
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+#include <plat/clock.h>
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+#include <plat/omap-pm.h>
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+#include <plat/common.h>
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+#include <plat/omap_device.h>
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+
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+#include <mach/hardware.h>
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+
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+#ifdef CONFIG_SMP
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+struct lpj_info {
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+ unsigned long ref;
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+ unsigned int freq;
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+};
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+
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+static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
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+static struct lpj_info global_lpj_ref;
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+#endif
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+
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+static struct cpufreq_frequency_table *freq_table;
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+static atomic_t freq_table_users = ATOMIC_INIT(0);
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+static struct clk *mpu_clk;
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+static char *mpu_clk_name;
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+static struct device *mpu_dev;
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+
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+static int omap_verify_speed(struct cpufreq_policy *policy)
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+{
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+ if (!freq_table)
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+ return -EINVAL;
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+ return cpufreq_frequency_table_verify(policy, freq_table);
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+}
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+
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+static unsigned int omap_getspeed(unsigned int cpu)
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+{
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+ unsigned long rate;
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+
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+ if (cpu >= NR_CPUS)
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+ return 0;
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+
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+ rate = clk_get_rate(mpu_clk) / 1000;
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+ return rate;
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+}
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+
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+static int omap_target(struct cpufreq_policy *policy,
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+ unsigned int target_freq,
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+ unsigned int relation)
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+{
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+ unsigned int i;
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+ int ret = 0;
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+ struct cpufreq_freqs freqs;
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+
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+ if (!freq_table) {
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+ dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__,
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+ policy->cpu);
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+ return -EINVAL;
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+ }
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+
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+ ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
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+ relation, &i);
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+ if (ret) {
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+ dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n",
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+ __func__, policy->cpu, target_freq, ret);
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+ return ret;
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+ }
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+ freqs.new = freq_table[i].frequency;
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+ if (!freqs.new) {
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+ dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__,
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+ policy->cpu, target_freq);
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+ return -EINVAL;
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+ }
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+
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+ freqs.old = omap_getspeed(policy->cpu);
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+ freqs.cpu = policy->cpu;
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+
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+ if (freqs.old == freqs.new && policy->cur == freqs.new)
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+ return ret;
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+
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+ /* notifiers */
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+ for_each_cpu(i, policy->cpus) {
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+ freqs.cpu = i;
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+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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+ }
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+
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+#ifdef CONFIG_CPU_FREQ_DEBUG
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+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new);
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+#endif
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+
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+ ret = clk_set_rate(mpu_clk, freqs.new * 1000);
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+ freqs.new = omap_getspeed(policy->cpu);
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+
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+#ifdef CONFIG_SMP
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+ /*
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+ * Note that loops_per_jiffy is not updated on SMP systems in
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+ * cpufreq driver. So, update the per-CPU loops_per_jiffy value
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+ * on frequency transition. We need to update all dependent CPUs.
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+ */
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+ for_each_cpu(i, policy->cpus) {
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+ struct lpj_info *lpj = &per_cpu(lpj_ref, i);
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+ if (!lpj->freq) {
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+ lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
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+ lpj->freq = freqs.old;
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+ }
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+
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+ per_cpu(cpu_data, i).loops_per_jiffy =
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+ cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
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+ }
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+
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+ /* And don't forget to adjust the global one */
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+ if (!global_lpj_ref.freq) {
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+ global_lpj_ref.ref = loops_per_jiffy;
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+ global_lpj_ref.freq = freqs.old;
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+ }
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+ loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
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+ freqs.new);
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+#endif
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+
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+ /* notifiers */
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+ for_each_cpu(i, policy->cpus) {
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+ freqs.cpu = i;
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+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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+ }
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+
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+ return ret;
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+}
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+
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+static inline void freq_table_free(void)
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+{
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+ if (atomic_dec_and_test(&freq_table_users))
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+ opp_free_cpufreq_table(mpu_dev, &freq_table);
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+}
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+
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+static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
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+{
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+ int result = 0;
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+
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+ mpu_clk = clk_get(NULL, mpu_clk_name);
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+ if (IS_ERR(mpu_clk))
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+ return PTR_ERR(mpu_clk);
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+
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+ if (policy->cpu >= NR_CPUS) {
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+ result = -EINVAL;
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+ goto fail_ck;
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+ }
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+
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+ policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
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+
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+ if (atomic_inc_return(&freq_table_users) == 1)
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+ result = opp_init_cpufreq_table(mpu_dev, &freq_table);
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+
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+ if (result) {
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+ dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n",
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+ __func__, policy->cpu, result);
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+ goto fail_ck;
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+ }
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+
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+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
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+ if (result)
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+ goto fail_table;
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+
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+ cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
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+
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+ policy->min = policy->cpuinfo.min_freq;
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+ policy->max = policy->cpuinfo.max_freq;
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+ policy->cur = omap_getspeed(policy->cpu);
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+
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+ /*
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+ * On OMAP SMP configuartion, both processors share the voltage
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+ * and clock. So both CPUs needs to be scaled together and hence
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+ * needs software co-ordination. Use cpufreq affected_cpus
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+ * interface to handle this scenario. Additional is_smp() check
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+ * is to keep SMP_ON_UP build working.
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+ */
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+ if (is_smp()) {
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+ policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
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+ cpumask_setall(policy->cpus);
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+ }
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+
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+ /* FIXME: what's the actual transition time? */
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+ policy->cpuinfo.transition_latency = 300 * 1000;
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+
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+ return 0;
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+
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+fail_table:
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+ freq_table_free();
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+fail_ck:
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+ clk_put(mpu_clk);
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+ return result;
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+}
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+
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+static int omap_cpu_exit(struct cpufreq_policy *policy)
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+{
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+ freq_table_free();
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+ clk_put(mpu_clk);
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+ return 0;
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+}
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+
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+static struct freq_attr *omap_cpufreq_attr[] = {
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+ &cpufreq_freq_attr_scaling_available_freqs,
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+ NULL,
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+};
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+
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+static struct cpufreq_driver omap_driver = {
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+ .flags = CPUFREQ_STICKY,
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+ .verify = omap_verify_speed,
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+ .target = omap_target,
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+ .get = omap_getspeed,
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+ .init = omap_cpu_init,
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+ .exit = omap_cpu_exit,
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+ .name = "omap",
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+ .attr = omap_cpufreq_attr,
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+};
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+
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+static int __init omap_cpufreq_init(void)
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+{
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+ if (cpu_is_omap24xx())
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+ mpu_clk_name = "virt_prcm_set";
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+ else if (cpu_is_omap34xx())
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+ mpu_clk_name = "dpll1_ck";
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+ else if (cpu_is_omap44xx())
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+ mpu_clk_name = "dpll_mpu_ck";
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+
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+ if (!mpu_clk_name) {
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+ pr_err("%s: unsupported Silicon?\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ mpu_dev = omap_device_get_by_hwmod_name("mpu");
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+ if (!mpu_dev) {
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+ pr_warning("%s: unable to get the mpu device\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ return cpufreq_register_driver(&omap_driver);
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+}
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+
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+static void __exit omap_cpufreq_exit(void)
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+{
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+ cpufreq_unregister_driver(&omap_driver);
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+}
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+
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+MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
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+MODULE_LICENSE("GPL");
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+module_init(omap_cpufreq_init);
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+module_exit(omap_cpufreq_exit);
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Dave Jones