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@@ -85,6 +85,18 @@ static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rd
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for (i = 0; i < num_indices; i++) {
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gpio = &i2c_info->asGPIO_Info[i];
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+ /* r4xx mask is technically not used by the hw, so patch in the legacy mask bits */
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+ if ((rdev->family == CHIP_R420) ||
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+ (rdev->family == CHIP_R423) ||
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+ (rdev->family == CHIP_RV410)) {
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+ if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
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+ (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
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+ (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
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+ gpio->ucClkMaskShift = 0x19;
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+ gpio->ucDataMaskShift = 0x18;
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+ }
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+ }
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+
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/* some evergreen boards have bad data for this entry */
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if (ASIC_IS_DCE4(rdev)) {
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if ((i == 7) &&
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@@ -1996,14 +2008,14 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev)
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return state_index;
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/* last mode is usually default, array is low to high */
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for (i = 0; i < num_modes; i++) {
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+ rdev->pm.power_state[state_index].clock_info =
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+ kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
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+ if (!rdev->pm.power_state[state_index].clock_info)
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+ return state_index;
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+ rdev->pm.power_state[state_index].num_clock_modes = 1;
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rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
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switch (frev) {
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case 1:
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- rdev->pm.power_state[state_index].clock_info =
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- kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
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- if (!rdev->pm.power_state[state_index].clock_info)
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- return state_index;
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- rdev->pm.power_state[state_index].num_clock_modes = 1;
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rdev->pm.power_state[state_index].clock_info[0].mclk =
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le16_to_cpu(power_info->info.asPowerPlayInfo[i].usMemoryClock);
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rdev->pm.power_state[state_index].clock_info[0].sclk =
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@@ -2039,11 +2051,6 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev)
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state_index++;
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break;
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case 2:
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- rdev->pm.power_state[state_index].clock_info =
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- kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
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- if (!rdev->pm.power_state[state_index].clock_info)
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- return state_index;
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- rdev->pm.power_state[state_index].num_clock_modes = 1;
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rdev->pm.power_state[state_index].clock_info[0].mclk =
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le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMemoryClock);
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rdev->pm.power_state[state_index].clock_info[0].sclk =
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@@ -2080,11 +2087,6 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev)
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state_index++;
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break;
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case 3:
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- rdev->pm.power_state[state_index].clock_info =
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- kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
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- if (!rdev->pm.power_state[state_index].clock_info)
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- return state_index;
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- rdev->pm.power_state[state_index].num_clock_modes = 1;
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rdev->pm.power_state[state_index].clock_info[0].mclk =
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le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMemoryClock);
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rdev->pm.power_state[state_index].clock_info[0].sclk =
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