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@@ -1970,6 +1970,20 @@ static void falcon_probe_spi_devices(struct efx_nic *efx)
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large_eeprom_type);
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}
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+static unsigned int falcon_a1_mem_map_size(struct efx_nic *efx)
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+{
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+ return 0x20000;
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+}
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+
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+static unsigned int falcon_b0_mem_map_size(struct efx_nic *efx)
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+{
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+ /* Map everything up to and including the RSS indirection table.
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+ * The PCI core takes care of mapping the MSI-X tables.
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+ */
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+ return FR_BZ_RX_INDIRECTION_TBL +
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+ FR_BZ_RX_INDIRECTION_TBL_STEP * FR_BZ_RX_INDIRECTION_TBL_ROWS;
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+}
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+
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static int falcon_probe_nic(struct efx_nic *efx)
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{
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struct falcon_nic_data *nic_data;
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@@ -2060,6 +2074,8 @@ static int falcon_probe_nic(struct efx_nic *efx)
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goto fail5;
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}
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+ efx->max_channels = (efx_nic_rev(efx) <= EFX_REV_FALCON_A1 ? 4 :
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+ EFX_MAX_CHANNELS);
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efx->timer_quantum_ns = 4968; /* 621 cycles */
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/* Initialise I2C adapter */
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@@ -2339,6 +2355,7 @@ static int falcon_set_wol(struct efx_nic *efx, u32 type)
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*/
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const struct efx_nic_type falcon_a1_nic_type = {
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+ .mem_map_size = falcon_a1_mem_map_size,
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.probe = falcon_probe_nic,
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.remove = falcon_remove_nic,
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.init = falcon_init_nic,
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@@ -2391,7 +2408,6 @@ const struct efx_nic_type falcon_a1_nic_type = {
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.ev_test_generate = efx_farch_ev_test_generate,
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.revision = EFX_REV_FALCON_A1,
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- .mem_map_size = 0x20000,
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.txd_ptr_tbl_base = FR_AA_TX_DESC_PTR_TBL_KER,
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.rxd_ptr_tbl_base = FR_AA_RX_DESC_PTR_TBL_KER,
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.buf_tbl_base = FR_AA_BUF_FULL_TBL_KER,
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@@ -2401,13 +2417,13 @@ const struct efx_nic_type falcon_a1_nic_type = {
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.rx_buffer_padding = 0x24,
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.can_rx_scatter = false,
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.max_interrupt_mode = EFX_INT_MODE_MSI,
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- .phys_addr_channels = 4,
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.timer_period_max = 1 << FRF_AB_TC_TIMER_VAL_WIDTH,
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.offload_features = NETIF_F_IP_CSUM,
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.mcdi_max_ver = -1,
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};
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const struct efx_nic_type falcon_b0_nic_type = {
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+ .mem_map_size = falcon_b0_mem_map_size,
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.probe = falcon_probe_nic,
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.remove = falcon_remove_nic,
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.init = falcon_init_nic,
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@@ -2461,12 +2477,6 @@ const struct efx_nic_type falcon_b0_nic_type = {
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.ev_test_generate = efx_farch_ev_test_generate,
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.revision = EFX_REV_FALCON_B0,
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- /* Map everything up to and including the RSS indirection
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- * table. Don't map MSI-X table, MSI-X PBA since Linux
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- * requires that they not be mapped. */
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- .mem_map_size = (FR_BZ_RX_INDIRECTION_TBL +
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- FR_BZ_RX_INDIRECTION_TBL_STEP *
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- FR_BZ_RX_INDIRECTION_TBL_ROWS),
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.txd_ptr_tbl_base = FR_BZ_TX_DESC_PTR_TBL,
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.rxd_ptr_tbl_base = FR_BZ_RX_DESC_PTR_TBL,
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.buf_tbl_base = FR_BZ_BUF_FULL_TBL,
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@@ -2477,9 +2487,6 @@ const struct efx_nic_type falcon_b0_nic_type = {
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.rx_buffer_padding = 0,
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.can_rx_scatter = true,
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.max_interrupt_mode = EFX_INT_MODE_MSIX,
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- .phys_addr_channels = 32, /* Hardware limit is 64, but the legacy
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- * interrupt handler only supports 32
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- * channels */
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.timer_period_max = 1 << FRF_AB_TC_TIMER_VAL_WIDTH,
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.offload_features = NETIF_F_IP_CSUM | NETIF_F_RXHASH | NETIF_F_NTUPLE,
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.mcdi_max_ver = -1,
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