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microblaze: Add architectural support for USB EHCI host controllers

Add architectural support for USB EHCI host controllers. It has been tested
using the USB EHCI host controller from Xilinx Inc., using both High Speed
devices and Full Speed devices.

Signed-off-by: Julie Zhu <julie.zhu@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Julie Zhu 16 anos atrás
pai
commit
afc26cb39e

+ 1 - 0
arch/microblaze/Kconfig

@@ -6,6 +6,7 @@ mainmenu "Linux/Microblaze Kernel Configuration"
 config MICROBLAZE
 config MICROBLAZE
 	def_bool y
 	def_bool y
 	select HAVE_LMB
 	select HAVE_LMB
+	select USB_ARCH_HAS_EHCI
 	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select ARCH_WANT_OPTIONAL_GPIOLIB
 
 
 config SWAP
 config SWAP

+ 3 - 0
arch/microblaze/include/asm/io.h

@@ -210,6 +210,9 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
 #define in_be32(a) __raw_readl((const void __iomem __force *)(a))
 #define in_be32(a) __raw_readl((const void __iomem __force *)(a))
 #define in_be16(a) __raw_readw(a)
 #define in_be16(a) __raw_readw(a)
 
 
+#define writel_be(v, a)	out_be32((__force unsigned *)a, v)
+#define readl_be(a)	in_be32((__force unsigned *)a)
+
 /*
 /*
  * Little endian
  * Little endian
  */
  */

+ 0 - 1
drivers/usb/Kconfig

@@ -22,7 +22,6 @@ config USB_ARCH_HAS_HCD
 	default y if PCMCIA && !M32R			# sl811_cs
 	default y if PCMCIA && !M32R			# sl811_cs
 	default y if ARM				# SL-811
 	default y if ARM				# SL-811
 	default y if SUPERH				# r8a66597-hcd
 	default y if SUPERH				# r8a66597-hcd
-	default y if MICROBLAZE
 	default PCI
 	default PCI
 
 
 # many non-PCI SOC chips embed OHCI
 # many non-PCI SOC chips embed OHCI