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@@ -1657,11 +1657,11 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
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priv->scd_base_addr = iwl_read_prph(priv, SCD_SRAM_BASE_ADDR);
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priv->scd_base_addr = iwl_read_prph(priv, SCD_SRAM_BASE_ADDR);
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a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
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a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
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for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
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for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
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- iwl_write_restricted_mem(priv, a, 0);
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+ iwl_write_targ_mem(priv, a, 0);
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for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
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for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
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- iwl_write_restricted_mem(priv, a, 0);
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+ iwl_write_targ_mem(priv, a, 0);
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for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
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for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
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- iwl_write_restricted_mem(priv, a, 0);
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+ iwl_write_targ_mem(priv, a, 0);
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iwl_write_prph(priv, SCD_DRAM_BASE_ADDR,
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iwl_write_prph(priv, SCD_DRAM_BASE_ADDR,
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(priv->hw_setting.shared_phys +
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(priv->hw_setting.shared_phys +
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@@ -1672,12 +1672,12 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
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for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
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for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
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iwl_write_prph(priv, SCD_QUEUE_RDPTR(i), 0);
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iwl_write_prph(priv, SCD_QUEUE_RDPTR(i), 0);
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iwl_write_restricted(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
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iwl_write_restricted(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
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- iwl_write_restricted_mem(priv, priv->scd_base_addr +
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+ iwl_write_targ_mem(priv, priv->scd_base_addr +
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SCD_CONTEXT_QUEUE_OFFSET(i),
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SCD_CONTEXT_QUEUE_OFFSET(i),
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(SCD_WIN_SIZE <<
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(SCD_WIN_SIZE <<
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SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
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SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
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SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
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SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
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- iwl_write_restricted_mem(priv, priv->scd_base_addr +
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+ iwl_write_targ_mem(priv, priv->scd_base_addr +
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SCD_CONTEXT_QUEUE_OFFSET(i) +
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SCD_CONTEXT_QUEUE_OFFSET(i) +
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sizeof(u32),
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sizeof(u32),
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(SCD_FRAME_LIMIT <<
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(SCD_FRAME_LIMIT <<
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@@ -4156,14 +4156,14 @@ static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
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tbl_dw_addr = priv->scd_base_addr +
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tbl_dw_addr = priv->scd_base_addr +
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SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
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SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
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- tbl_dw = iwl_read_restricted_mem(priv, tbl_dw_addr);
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+ tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
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if (txq_id & 0x1)
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if (txq_id & 0x1)
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tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
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tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
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else
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else
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tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
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tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
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- iwl_write_restricted_mem(priv, tbl_dw_addr, tbl_dw);
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+ iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
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return 0;
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return 0;
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}
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}
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@@ -4207,12 +4207,12 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
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/* supposes that ssn_idx is valid (!= 0xFFF) */
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/* supposes that ssn_idx is valid (!= 0xFFF) */
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iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
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iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
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- iwl_write_restricted_mem(priv,
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+ iwl_write_targ_mem(priv,
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priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
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priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
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(SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
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(SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
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SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
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SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
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- iwl_write_restricted_mem(priv, priv->scd_base_addr +
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+ iwl_write_targ_mem(priv, priv->scd_base_addr +
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SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
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SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
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(SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
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(SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
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& SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
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& SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
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