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@@ -372,9 +372,17 @@ acpi_hw_read_multiple(u32 *value,
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}
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}
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- /* Shift the B bits above the A bits */
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-
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- *value = value_a | (value_b << register_a->bit_width);
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+ /*
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+ * OR the two return values together. No shifting or masking is necessary,
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+ * because of how the PM1 registers are defined in the ACPI specification:
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+ *
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+ * "Although the bits can be split between the two register blocks (each
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+ * register block has a unique pointer within the FADT), the bit positions
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+ * are maintained. The register block with unimplemented bits (that is,
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+ * those implemented in the other register block) always returns zeros,
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+ * and writes have no side effects"
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+ */
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+ *value = (value_a | value_b);
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return (AE_OK);
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}
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@@ -406,13 +414,20 @@ acpi_hw_write_multiple(u32 value,
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return (status);
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}
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- /* Second register is optional */
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-
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+ /*
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+ * Second register is optional
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+ *
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+ * No bit shifting or clearing is necessary, because of how the PM1
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+ * registers are defined in the ACPI specification:
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+ *
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+ * "Although the bits can be split between the two register blocks (each
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+ * register block has a unique pointer within the FADT), the bit positions
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+ * are maintained. The register block with unimplemented bits (that is,
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+ * those implemented in the other register block) always returns zeros,
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+ * and writes have no side effects"
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+ */
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if (register_b->address) {
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-
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- /* Normalize the B bits before write */
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-
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- status = acpi_write(value >> register_a->bit_width, register_b);
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+ status = acpi_write(value, register_b);
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}
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return (status);
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