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@@ -629,8 +629,7 @@ static void hdmi_core_av_packet_config(struct hdmi_ip_data *ip_data,
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}
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static void hdmi_wp_init(struct omap_video_timings *timings,
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- struct hdmi_video_format *video_fmt,
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- struct hdmi_video_interface *video_int)
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+ struct hdmi_video_format *video_fmt)
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{
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pr_debug("Enter hdmi_wp_init\n");
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@@ -645,12 +644,6 @@ static void hdmi_wp_init(struct omap_video_timings *timings,
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video_fmt->y_res = 0;
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video_fmt->x_res = 0;
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- video_int->vsp = 0;
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- video_int->hsp = 0;
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-
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- video_int->interlacing = 0;
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- video_int->tm = 0; /* HDMI_TIMING_SLAVE */
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-
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}
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void ti_hdmi_4xxx_wp_video_start(struct hdmi_ip_data *ip_data, bool start)
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@@ -687,17 +680,16 @@ static void hdmi_wp_video_config_format(struct hdmi_ip_data *ip_data,
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hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_SIZE, l);
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}
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-static void hdmi_wp_video_config_interface(struct hdmi_ip_data *ip_data,
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- struct hdmi_video_interface *video_int)
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+static void hdmi_wp_video_config_interface(struct hdmi_ip_data *ip_data)
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{
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u32 r;
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pr_debug("Enter hdmi_wp_video_config_interface\n");
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r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG);
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- r = FLD_MOD(r, video_int->vsp, 7, 7);
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- r = FLD_MOD(r, video_int->hsp, 6, 6);
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- r = FLD_MOD(r, video_int->interlacing, 3, 3);
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- r = FLD_MOD(r, video_int->tm, 1, 0);
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+ r = FLD_MOD(r, ip_data->cfg.timings.vsync_pol, 7, 7);
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+ r = FLD_MOD(r, ip_data->cfg.timings.hsync_pol, 6, 6);
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+ r = FLD_MOD(r, ip_data->cfg.interlace, 3, 3);
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+ r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */
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hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, r);
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}
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@@ -725,15 +717,13 @@ void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data)
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/* HDMI */
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struct omap_video_timings video_timing;
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struct hdmi_video_format video_format;
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- struct hdmi_video_interface video_interface;
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/* HDMI core */
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struct hdmi_core_infoframe_avi avi_cfg;
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struct hdmi_core_video_config v_core_cfg;
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struct hdmi_core_packet_enable_repeat repeat_cfg;
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struct hdmi_config *cfg = &ip_data->cfg;
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- hdmi_wp_init(&video_timing, &video_format,
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- &video_interface);
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+ hdmi_wp_init(&video_timing, &video_format);
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hdmi_core_init(&v_core_cfg,
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&avi_cfg,
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@@ -748,12 +738,7 @@ void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data)
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hdmi_wp_video_config_format(ip_data, &video_format);
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- video_interface.vsp = cfg->timings.vsync_pol;
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- video_interface.hsp = cfg->timings.hsync_pol;
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- video_interface.interlacing = cfg->interlace;
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- video_interface.tm = 1 ; /* HDMI_TIMING_MASTER_24BIT */
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-
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- hdmi_wp_video_config_interface(ip_data, &video_interface);
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+ hdmi_wp_video_config_interface(ip_data);
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/*
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* configure core video part
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