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@@ -1046,15 +1046,12 @@ static int iwl_trans_pcie_start_fw(struct iwl_trans *trans,
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/*
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* Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
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- * must be called under the irq lock and with MAC access
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*/
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static void iwl_trans_txq_set_sched(struct iwl_trans *trans, u32 mask)
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{
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struct iwl_trans_pcie __maybe_unused *trans_pcie =
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IWL_TRANS_GET_PCIE_TRANS(trans);
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- lockdep_assert_held(&trans_pcie->irq_lock);
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-
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iwl_write_prph(trans, SCD_TXFACT, mask);
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}
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@@ -1062,12 +1059,9 @@ static void iwl_tx_start(struct iwl_trans *trans)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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u32 a;
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- unsigned long flags;
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int i, chan;
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u32 reg_val;
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- spin_lock_irqsave(&trans_pcie->irq_lock, flags);
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-
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/* make sure all queue are not stopped/used */
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memset(trans_pcie->queue_stopped, 0, sizeof(trans_pcie->queue_stopped));
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memset(trans_pcie->queue_used, 0, sizeof(trans_pcie->queue_used));
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@@ -1118,8 +1112,6 @@ static void iwl_tx_start(struct iwl_trans *trans)
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iwl_write_direct32(trans, FH_TX_CHICKEN_BITS_REG,
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reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
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- spin_unlock_irqrestore(&trans_pcie->irq_lock, flags);
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-
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/* Enable L1-Active */
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iwl_clear_bits_prph(trans, APMG_PCIDEV_STT_REG,
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APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
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