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@@ -383,6 +383,11 @@ static int i965_do_reset(struct drm_device *dev, u8 flags)
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{
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u8 gdrst;
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+ /*
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+ * Set the domains we want to reset (GRDOM/bits 2 and 3) as
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+ * well as the reset bit (GR/bit 0). Setting the GR bit
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+ * triggers the reset; when done, the hardware will clear it.
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+ */
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pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
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pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);
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@@ -427,13 +432,10 @@ int i915_reset(struct drm_device *dev, u8 flags)
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i915_gem_reset(dev);
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- /*
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- * Set the domains we want to reset (GRDOM/bits 2 and 3) as
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- * well as the reset bit (GR/bit 0). Setting the GR bit
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- * triggers the reset; when done, the hardware will clear it.
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- */
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ret = -ENODEV;
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- switch (INTEL_INFO(dev)->gen) {
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+ if (get_seconds() - dev_priv->last_gpu_reset < 5) {
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+ DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
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+ } else switch (INTEL_INFO(dev)->gen) {
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case 5:
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ret = ironlake_do_reset(dev, flags);
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break;
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@@ -444,6 +446,7 @@ int i915_reset(struct drm_device *dev, u8 flags)
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ret = i8xx_do_reset(dev, flags);
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break;
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}
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+ dev_priv->last_gpu_reset = get_seconds();
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if (ret) {
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DRM_ERROR("Failed to reset chip.\n");
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mutex_unlock(&dev->struct_mutex);
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