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[ARM] Kirkwood: platform device registration for the crypto engine

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Nicolas Pitre vor 16 Jahren
Ursprung
Commit
ae5c8c8373
2 geänderte Dateien mit 40 neuen und 0 gelöschten Zeilen
  1. 38 0
      arch/arm/mach-kirkwood/common.c
  2. 2 0
      arch/arm/mach-kirkwood/include/mach/kirkwood.h

+ 38 - 0
arch/arm/mach-kirkwood/common.c

@@ -560,6 +560,43 @@ void __init kirkwood_uart1_init(void)
 }
 
 
+/*****************************************************************************
+ * Cryptographic Engines and Security Accelerator (CESA)
+ ****************************************************************************/
+
+static struct resource kirkwood_crypto_res[] = {
+	{
+		.name   = "regs",
+		.start  = CRYPTO_PHYS_BASE,
+		.end    = CRYPTO_PHYS_BASE + 0xffff,
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.name   = "sram",
+		.start  = KIRKWOOD_SRAM_PHYS_BASE,
+		.end    = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.name   = "crypto interrupt",
+		.start  = IRQ_KIRKWOOD_CRYPTO,
+		.end    = IRQ_KIRKWOOD_CRYPTO,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device kirkwood_crypto_device = {
+	.name           = "mv_crypto",
+	.id             = -1,
+	.num_resources  = ARRAY_SIZE(kirkwood_crypto_res),
+	.resource       = kirkwood_crypto_res,
+};
+
+void __init kirkwood_crypto_init(void)
+{
+	kirkwood_clk_ctrl |= CGC_CRYPTO;
+	platform_device_register(&kirkwood_crypto_device);
+}
+
+
 /*****************************************************************************
  * XOR
  ****************************************************************************/
@@ -886,6 +923,7 @@ void __init kirkwood_init(void)
 	kirkwood_wdt_init();
 	kirkwood_xor0_init();
 	kirkwood_xor1_init();
+	kirkwood_crypto_init();
 }
 
 static int __init kirkwood_clock_gate(void)

+ 2 - 0
arch/arm/mach-kirkwood/include/mach/kirkwood.h

@@ -66,6 +66,8 @@
 
 #define BRIDGE_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE | 0x20000)
 
+#define CRYPTO_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE | 0x30000)
+
 #define PCIE_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE | 0x40000)
 #define PCIE_LINK_CTRL		(PCIE_VIRT_BASE | 0x70)
 #define PCIE_STATUS		(PCIE_VIRT_BASE | 0x1a04)