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@@ -0,0 +1,588 @@
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+/*
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+ * Renesas R-Car SSIU/SSI support
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+ *
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+ * Copyright (C) 2013 Renesas Solutions Corp.
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+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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+ *
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+ * Based on fsi.c
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+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+#include <linux/delay.h>
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+#include "rsnd.h"
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+#define RSND_SSI_NAME_SIZE 16
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+
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+/*
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+ * SSICR
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+ */
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+#define FORCE (1 << 31) /* Fixed */
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+#define UIEN (1 << 27) /* Underflow Interrupt Enable */
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+#define OIEN (1 << 26) /* Overflow Interrupt Enable */
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+#define IIEN (1 << 25) /* Idle Mode Interrupt Enable */
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+#define DIEN (1 << 24) /* Data Interrupt Enable */
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+
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+#define DWL_8 (0 << 19) /* Data Word Length */
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+#define DWL_16 (1 << 19) /* Data Word Length */
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+#define DWL_18 (2 << 19) /* Data Word Length */
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+#define DWL_20 (3 << 19) /* Data Word Length */
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+#define DWL_22 (4 << 19) /* Data Word Length */
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+#define DWL_24 (5 << 19) /* Data Word Length */
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+#define DWL_32 (6 << 19) /* Data Word Length */
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+
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+#define SWL_32 (3 << 16) /* R/W System Word Length */
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+#define SCKD (1 << 15) /* Serial Bit Clock Direction */
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+#define SWSD (1 << 14) /* Serial WS Direction */
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+#define SCKP (1 << 13) /* Serial Bit Clock Polarity */
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+#define SWSP (1 << 12) /* Serial WS Polarity */
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+#define SDTA (1 << 10) /* Serial Data Alignment */
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+#define DEL (1 << 8) /* Serial Data Delay */
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+#define CKDV(v) (v << 4) /* Serial Clock Division Ratio */
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+#define TRMD (1 << 1) /* Transmit/Receive Mode Select */
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+#define EN (1 << 0) /* SSI Module Enable */
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+
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+/*
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+ * SSISR
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+ */
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+#define UIRQ (1 << 27) /* Underflow Error Interrupt Status */
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+#define OIRQ (1 << 26) /* Overflow Error Interrupt Status */
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+#define IIRQ (1 << 25) /* Idle Mode Interrupt Status */
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+#define DIRQ (1 << 24) /* Data Interrupt Status Flag */
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+
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+struct rsnd_ssi {
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+ struct clk *clk;
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+ struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
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+ struct rsnd_ssi *parent;
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+ struct rsnd_mod mod;
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+
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+ struct rsnd_dai *rdai;
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+ struct rsnd_dai_stream *io;
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+ u32 cr_own;
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+ u32 cr_clk;
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+ u32 cr_etc;
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+ int err;
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+ unsigned int usrcnt;
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+ unsigned int rate;
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+};
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+
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+struct rsnd_ssiu {
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+ u32 ssi_mode0;
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+ u32 ssi_mode1;
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+
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+ int ssi_nr;
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+ struct rsnd_ssi *ssi;
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+};
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+
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+#define for_each_rsnd_ssi(pos, priv, i) \
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+ for (i = 0; \
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+ (i < rsnd_ssi_nr(priv)) && \
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+ ((pos) = ((struct rsnd_ssiu *)((priv)->ssiu))->ssi + i); \
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+ i++)
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+
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+#define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr)
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+#define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
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+#define rsnd_ssi_is_pio(ssi) ((ssi)->info->pio_irq > 0)
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+#define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
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+#define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
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+#define rsnd_ssi_mode_flags(p) ((p)->info->flags)
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+#define rsnd_ssi_to_ssiu(ssi)\
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+ (((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
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+
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+static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
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+ struct rsnd_ssiu *ssiu)
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+{
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+ struct rsnd_ssi *ssi;
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+ u32 flags;
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+ u32 val;
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+ int i;
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+
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+ /*
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+ * SSI_MODE0
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+ */
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+ ssiu->ssi_mode0 = 0;
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+ for_each_rsnd_ssi(ssi, priv, i)
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+ ssiu->ssi_mode0 |= (1 << i);
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+
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+ /*
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+ * SSI_MODE1
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+ */
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+#define ssi_parent_set(p, sync, adg, ext) \
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+ do { \
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+ ssi->parent = ssiu->ssi + p; \
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+ if (flags & RSND_SSI_CLK_FROM_ADG) \
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+ val = adg; \
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+ else \
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+ val = ext; \
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+ if (flags & RSND_SSI_SYNC) \
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+ val |= sync; \
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+ } while (0)
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+
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+ ssiu->ssi_mode1 = 0;
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+ for_each_rsnd_ssi(ssi, priv, i) {
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+ flags = rsnd_ssi_mode_flags(ssi);
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+
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+ if (!(flags & RSND_SSI_CLK_PIN_SHARE))
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+ continue;
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+
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+ val = 0;
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+ switch (i) {
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+ case 1:
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+ ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0));
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+ break;
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+ case 2:
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+ ssi_parent_set(0, (1 << 4), (0x2 << 2), (0x1 << 2));
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+ break;
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+ case 4:
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+ ssi_parent_set(3, (1 << 20), (0x2 << 16), (0x1 << 16));
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+ break;
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+ case 8:
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+ ssi_parent_set(7, 0, 0, 0);
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+ break;
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+ }
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+
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+ ssiu->ssi_mode1 |= val;
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+ }
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+}
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+
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+static void rsnd_ssi_mode_set(struct rsnd_ssi *ssi)
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+{
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+ struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
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+
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+ rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0);
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+ rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1);
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+}
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+
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+static void rsnd_ssi_status_check(struct rsnd_mod *mod,
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+ u32 bit)
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+{
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+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
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+ struct device *dev = rsnd_priv_to_dev(priv);
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+ u32 status;
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+ int i;
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+
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+ for (i = 0; i < 1024; i++) {
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+ status = rsnd_mod_read(mod, SSISR);
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+ if (status & bit)
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+ return;
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+
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+ udelay(50);
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+ }
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+
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+ dev_warn(dev, "status check failed\n");
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+}
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+
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+static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi,
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+ unsigned int rate)
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+{
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+ struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
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+ struct device *dev = rsnd_priv_to_dev(priv);
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+ int i, j, ret;
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+ int adg_clk_div_table[] = {
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+ 1, 6, /* see adg.c */
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+ };
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+ int ssi_clk_mul_table[] = {
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+ 1, 2, 4, 8, 16, 6, 12,
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+ };
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+ unsigned int main_rate;
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+
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+ /*
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+ * Find best clock, and try to start ADG
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+ */
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+ for (i = 0; i < ARRAY_SIZE(adg_clk_div_table); i++) {
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+ for (j = 0; j < ARRAY_SIZE(ssi_clk_mul_table); j++) {
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+
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+ /*
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+ * this driver is assuming that
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+ * system word is 64fs (= 2 x 32bit)
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+ * see rsnd_ssi_start()
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+ */
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+ main_rate = rate / adg_clk_div_table[i]
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+ * 32 * 2 * ssi_clk_mul_table[j];
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+
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+ ret = rsnd_adg_ssi_clk_try_start(&ssi->mod, main_rate);
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+ if (0 == ret) {
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+ ssi->rate = rate;
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+ ssi->cr_clk = FORCE | SWL_32 |
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+ SCKD | SWSD | CKDV(j);
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+
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+ dev_dbg(dev, "ssi%d outputs %u Hz\n",
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+ rsnd_mod_id(&ssi->mod), rate);
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+
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+ return 0;
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+ }
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+ }
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+ }
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+
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+ dev_err(dev, "unsupported clock rate\n");
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+ return -EIO;
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+}
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+
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+static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi)
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+{
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+ ssi->rate = 0;
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+ ssi->cr_clk = 0;
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+ rsnd_adg_ssi_clk_stop(&ssi->mod);
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+}
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+
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+static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
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+ struct rsnd_dai *rdai,
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+ struct rsnd_dai_stream *io)
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+{
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+ struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
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+ struct device *dev = rsnd_priv_to_dev(priv);
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+ u32 cr;
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+
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+ if (0 == ssi->usrcnt) {
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+ clk_enable(ssi->clk);
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+
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+ if (rsnd_rdai_is_clk_master(rdai)) {
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+ struct snd_pcm_runtime *runtime;
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+
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+ runtime = rsnd_io_to_runtime(io);
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+
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+ if (rsnd_ssi_clk_from_parent(ssi))
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+ rsnd_ssi_hw_start(ssi->parent, rdai, io);
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+ else
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+ rsnd_ssi_master_clk_start(ssi, runtime->rate);
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+ }
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+ }
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+
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+ cr = ssi->cr_own |
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+ ssi->cr_clk |
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+ ssi->cr_etc |
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+ EN;
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+
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+ rsnd_mod_write(&ssi->mod, SSICR, cr);
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+
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+ ssi->usrcnt++;
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+
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+ dev_dbg(dev, "ssi%d hw started\n", rsnd_mod_id(&ssi->mod));
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+}
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+
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+static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
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+ struct rsnd_dai *rdai)
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+{
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+ struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
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+ struct device *dev = rsnd_priv_to_dev(priv);
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+ u32 cr;
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+
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+ if (0 == ssi->usrcnt) /* stop might be called without start */
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+ return;
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+
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+ ssi->usrcnt--;
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+
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+ if (0 == ssi->usrcnt) {
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+ /*
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+ * disable all IRQ,
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+ * and, wait all data was sent
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+ */
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+ cr = ssi->cr_own |
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+ ssi->cr_clk;
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+
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+ rsnd_mod_write(&ssi->mod, SSICR, cr | EN);
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+ rsnd_ssi_status_check(&ssi->mod, DIRQ);
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+
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+ /*
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+ * disable SSI,
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+ * and, wait idle state
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+ */
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+ rsnd_mod_write(&ssi->mod, SSICR, cr); /* disabled all */
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+ rsnd_ssi_status_check(&ssi->mod, IIRQ);
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+
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+ if (rsnd_rdai_is_clk_master(rdai)) {
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+ if (rsnd_ssi_clk_from_parent(ssi))
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+ rsnd_ssi_hw_stop(ssi->parent, rdai);
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+ else
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+ rsnd_ssi_master_clk_stop(ssi);
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+ }
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+
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+ clk_disable(ssi->clk);
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+ }
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+
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+ dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
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+}
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+
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+/*
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+ * SSI mod common functions
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+ */
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+static int rsnd_ssi_init(struct rsnd_mod *mod,
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+ struct rsnd_dai *rdai,
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+ struct rsnd_dai_stream *io)
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+{
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+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
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+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
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+ struct device *dev = rsnd_priv_to_dev(priv);
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+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
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+ u32 cr;
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+
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+ cr = FORCE;
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+
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+ /*
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+ * always use 32bit system word for easy clock calculation.
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+ * see also rsnd_ssi_master_clk_enable()
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+ */
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+ cr |= SWL_32;
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+
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+ /*
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+ * init clock settings for SSICR
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+ */
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+ switch (runtime->sample_bits) {
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+ case 16:
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+ cr |= DWL_16;
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+ break;
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+ case 32:
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+ cr |= DWL_24;
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+ break;
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+ default:
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+ return -EIO;
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+ }
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+
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+ if (rdai->bit_clk_inv)
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+ cr |= SCKP;
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+ if (rdai->frm_clk_inv)
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+ cr |= SWSP;
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+ if (rdai->data_alignment)
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+ cr |= SDTA;
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+ if (rdai->sys_delay)
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+ cr |= DEL;
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+ if (rsnd_dai_is_play(rdai, io))
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+ cr |= TRMD;
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+
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+ /*
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+ * set ssi parameter
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+ */
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+ ssi->rdai = rdai;
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+ ssi->io = io;
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+ ssi->cr_own = cr;
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+ ssi->err = -1; /* ignore 1st error */
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+
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+ rsnd_ssi_mode_set(ssi);
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+
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+ dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
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+
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+ return 0;
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+}
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+
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+static int rsnd_ssi_quit(struct rsnd_mod *mod,
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+ struct rsnd_dai *rdai,
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+ struct rsnd_dai_stream *io)
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+{
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+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
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+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
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+ struct device *dev = rsnd_priv_to_dev(priv);
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+
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+ dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
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+
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+ if (ssi->err > 0)
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+ dev_warn(dev, "ssi under/over flow err = %d\n", ssi->err);
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+
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+ ssi->rdai = NULL;
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+ ssi->io = NULL;
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+ ssi->cr_own = 0;
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+ ssi->err = 0;
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+
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+ return 0;
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+}
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+
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+static void rsnd_ssi_record_error(struct rsnd_ssi *ssi, u32 status)
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+{
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+ /* under/over flow error */
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+ if (status & (UIRQ | OIRQ)) {
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+ ssi->err++;
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+
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+ /* clear error status */
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+ rsnd_mod_write(&ssi->mod, SSISR, 0);
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+ }
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+}
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+
|
|
|
+/*
|
|
|
+ * SSI PIO
|
|
|
+ */
|
|
|
+static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
|
|
|
+{
|
|
|
+ struct rsnd_ssi *ssi = data;
|
|
|
+ struct rsnd_dai_stream *io = ssi->io;
|
|
|
+ u32 status = rsnd_mod_read(&ssi->mod, SSISR);
|
|
|
+ irqreturn_t ret = IRQ_NONE;
|
|
|
+
|
|
|
+ if (io && (status & DIRQ)) {
|
|
|
+ struct rsnd_dai *rdai = ssi->rdai;
|
|
|
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
|
|
|
+ u32 *buf = (u32 *)(runtime->dma_area +
|
|
|
+ rsnd_dai_pointer_offset(io, 0));
|
|
|
+
|
|
|
+ rsnd_ssi_record_error(ssi, status);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * 8/16/32 data can be assesse to TDR/RDR register
|
|
|
+ * directly as 32bit data
|
|
|
+ * see rsnd_ssi_init()
|
|
|
+ */
|
|
|
+ if (rsnd_dai_is_play(rdai, io))
|
|
|
+ rsnd_mod_write(&ssi->mod, SSITDR, *buf);
|
|
|
+ else
|
|
|
+ *buf = rsnd_mod_read(&ssi->mod, SSIRDR);
|
|
|
+
|
|
|
+ rsnd_dai_pointer_update(io, sizeof(*buf));
|
|
|
+
|
|
|
+ ret = IRQ_HANDLED;
|
|
|
+ }
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
|
|
|
+ struct rsnd_dai *rdai,
|
|
|
+ struct rsnd_dai_stream *io)
|
|
|
+{
|
|
|
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
|
|
|
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
|
|
|
+ struct device *dev = rsnd_priv_to_dev(priv);
|
|
|
+
|
|
|
+ /* enable PIO IRQ */
|
|
|
+ ssi->cr_etc = UIEN | OIEN | DIEN;
|
|
|
+
|
|
|
+ rsnd_ssi_hw_start(ssi, rdai, io);
|
|
|
+
|
|
|
+ dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
|
|
|
+ struct rsnd_dai *rdai,
|
|
|
+ struct rsnd_dai_stream *io)
|
|
|
+{
|
|
|
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
|
|
|
+ struct device *dev = rsnd_priv_to_dev(priv);
|
|
|
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
|
|
|
+
|
|
|
+ dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
|
|
|
+
|
|
|
+ ssi->cr_etc = 0;
|
|
|
+
|
|
|
+ rsnd_ssi_hw_stop(ssi, rdai);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
|
|
|
+ .name = "ssi (pio)",
|
|
|
+ .init = rsnd_ssi_init,
|
|
|
+ .quit = rsnd_ssi_quit,
|
|
|
+ .start = rsnd_ssi_pio_start,
|
|
|
+ .stop = rsnd_ssi_pio_stop,
|
|
|
+};
|
|
|
+
|
|
|
+/*
|
|
|
+ * Non SSI
|
|
|
+ */
|
|
|
+static int rsnd_ssi_non(struct rsnd_mod *mod,
|
|
|
+ struct rsnd_dai *rdai,
|
|
|
+ struct rsnd_dai_stream *io)
|
|
|
+{
|
|
|
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
|
|
|
+ struct device *dev = rsnd_priv_to_dev(priv);
|
|
|
+
|
|
|
+ dev_dbg(dev, "%s\n", __func__);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static struct rsnd_mod_ops rsnd_ssi_non_ops = {
|
|
|
+ .name = "ssi (non)",
|
|
|
+ .init = rsnd_ssi_non,
|
|
|
+ .quit = rsnd_ssi_non,
|
|
|
+ .start = rsnd_ssi_non,
|
|
|
+ .stop = rsnd_ssi_non,
|
|
|
+};
|
|
|
+
|
|
|
+/*
|
|
|
+ * ssi mod function
|
|
|
+ */
|
|
|
+struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
|
|
|
+{
|
|
|
+ BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv));
|
|
|
+
|
|
|
+ return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod;
|
|
|
+}
|
|
|
+
|
|
|
+int rsnd_ssi_probe(struct platform_device *pdev,
|
|
|
+ struct rcar_snd_info *info,
|
|
|
+ struct rsnd_priv *priv)
|
|
|
+{
|
|
|
+ struct rsnd_ssi_platform_info *pinfo;
|
|
|
+ struct device *dev = rsnd_priv_to_dev(priv);
|
|
|
+ struct rsnd_mod_ops *ops;
|
|
|
+ struct clk *clk;
|
|
|
+ struct rsnd_ssiu *ssiu;
|
|
|
+ struct rsnd_ssi *ssi;
|
|
|
+ char name[RSND_SSI_NAME_SIZE];
|
|
|
+ int i, nr, ret;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * init SSI
|
|
|
+ */
|
|
|
+ nr = info->ssi_info_nr;
|
|
|
+ ssiu = devm_kzalloc(dev, sizeof(*ssiu) + (sizeof(*ssi) * nr),
|
|
|
+ GFP_KERNEL);
|
|
|
+ if (!ssiu) {
|
|
|
+ dev_err(dev, "SSI allocate failed\n");
|
|
|
+ return -ENOMEM;
|
|
|
+ }
|
|
|
+
|
|
|
+ priv->ssiu = ssiu;
|
|
|
+ ssiu->ssi = (struct rsnd_ssi *)(ssiu + 1);
|
|
|
+ ssiu->ssi_nr = nr;
|
|
|
+
|
|
|
+ for_each_rsnd_ssi(ssi, priv, i) {
|
|
|
+ pinfo = &info->ssi_info[i];
|
|
|
+
|
|
|
+ snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i);
|
|
|
+
|
|
|
+ clk = clk_get(dev, name);
|
|
|
+ if (IS_ERR(clk))
|
|
|
+ return PTR_ERR(clk);
|
|
|
+
|
|
|
+ ssi->info = pinfo;
|
|
|
+ ssi->clk = clk;
|
|
|
+
|
|
|
+ ops = &rsnd_ssi_non_ops;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * SSI PIO case
|
|
|
+ */
|
|
|
+ if (rsnd_ssi_is_pio(ssi)) {
|
|
|
+ ret = devm_request_irq(dev, pinfo->pio_irq,
|
|
|
+ &rsnd_ssi_pio_interrupt,
|
|
|
+ IRQF_SHARED,
|
|
|
+ dev_name(dev), ssi);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(dev, "SSI request interrupt failed\n");
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+
|
|
|
+ ops = &rsnd_ssi_pio_ops;
|
|
|
+ }
|
|
|
+
|
|
|
+ rsnd_mod_init(priv, &ssi->mod, ops, i);
|
|
|
+ }
|
|
|
+
|
|
|
+ rsnd_ssi_mode_init(priv, ssiu);
|
|
|
+
|
|
|
+ dev_dbg(dev, "ssi probed\n");
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+void rsnd_ssi_remove(struct platform_device *pdev,
|
|
|
+ struct rsnd_priv *priv)
|
|
|
+{
|
|
|
+ struct rsnd_ssi *ssi;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ for_each_rsnd_ssi(ssi, priv, i)
|
|
|
+ clk_put(ssi->clk);
|
|
|
+}
|