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+/*
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+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
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+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
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+
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public
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+ * License as published by the Free Software Foundation;
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+ * either version 2, or (at your option) any later version.
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+
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
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+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
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+ * A PARTICULAR PURPOSE.See the GNU General Public License
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+ * for more details.
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+
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc.,
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+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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+ */
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+#ifndef __CHIP_H__
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+#define __CHIP_H__
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+
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+#include "global.h"
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+
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+/***************************************/
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+/* Definition Graphic Chip Information */
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+/***************************************/
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+
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+#define PCI_VIA_VENDOR_ID 0x1106
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+
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+/* Define VIA Graphic Chip Name */
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+#define UNICHROME_CLE266 1
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+#define UNICHROME_CLE266_DID 0x3122
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+#define CLE266_REVISION_AX 0x0A
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+#define CLE266_REVISION_CX 0x0C
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+
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+#define UNICHROME_K400 2
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+#define UNICHROME_K400_DID 0x7205
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+
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+#define UNICHROME_K800 3
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+#define UNICHROME_K800_DID 0x3108
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+
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+#define UNICHROME_PM800 4
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+#define UNICHROME_PM800_DID 0x3118
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+
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+#define UNICHROME_CN700 5
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+#define UNICHROME_CN700_DID 0x3344
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+
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+#define UNICHROME_CX700 6
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+#define UNICHROME_CX700_DID 0x3157
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+#define CX700_REVISION_700 0x0
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+#define CX700_REVISION_700M 0x1
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+#define CX700_REVISION_700M2 0x2
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+
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+#define UNICHROME_CN750 7
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+#define UNICHROME_CN750_DID 0x3225
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+
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+#define UNICHROME_K8M890 8
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+#define UNICHROME_K8M890_DID 0x3230
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+
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+#define UNICHROME_P4M890 9
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+#define UNICHROME_P4M890_DID 0x3343
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+
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+#define UNICHROME_P4M900 10
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+#define UNICHROME_P4M900_DID 0x3371
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+
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+#define UNICHROME_VX800 11
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+#define UNICHROME_VX800_DID 0x1122
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+
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+/**************************************************/
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+/* Definition TMDS Trasmitter Information */
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+/**************************************************/
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+
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+/* Definition TMDS Trasmitter Index */
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+#define NON_TMDS_TRANSMITTER 0x00
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+#define VT1632_TMDS 0x01
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+#define INTEGRATED_TMDS 0x42
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+
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+/* Definition TMDS Trasmitter I2C Slave Address */
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+#define VT1632_TMDS_I2C_ADDR 0x10
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+
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+/**************************************************/
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+/* Definition LVDS Trasmitter Information */
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+/**************************************************/
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+
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+/* Definition LVDS Trasmitter Index */
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+#define NON_LVDS_TRANSMITTER 0x00
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+#define VT1631_LVDS 0x01
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+#define VT1636_LVDS 0x0E
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+#define INTEGRATED_LVDS 0x41
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+
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+/* Definition Digital Transmitter Mode */
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+#define TX_DATA_12_BITS 0x01
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+#define TX_DATA_24_BITS 0x02
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+#define TX_DATA_DDR_MODE 0x04
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+#define TX_DATA_SDR_MODE 0x08
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+
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+/* Definition LVDS Trasmitter I2C Slave Address */
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+#define VT1631_LVDS_I2C_ADDR 0x70
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+#define VT3271_LVDS_I2C_ADDR 0x80
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+#define VT1636_LVDS_I2C_ADDR 0x80
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+
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+struct tmds_chip_information {
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+ int tmds_chip_name;
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+ int tmds_chip_slave_addr;
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+ int dvi_panel_id;
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+ int data_mode;
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+ int output_interface;
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+ int i2c_port;
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+ int device_type;
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+};
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+
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+struct lvds_chip_information {
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+ int lvds_chip_name;
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+ int lvds_chip_slave_addr;
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+ int data_mode;
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+ int output_interface;
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+ int i2c_port;
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+};
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+
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+struct chip_information {
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+ int gfx_chip_name;
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+ int gfx_chip_revision;
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+ int chip_on_slot;
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+ struct tmds_chip_information tmds_chip_info;
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+ struct lvds_chip_information lvds_chip_info;
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+ struct lvds_chip_information lvds_chip_info2;
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+};
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+
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+struct crt_setting_information {
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+ int iga_path;
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+ int h_active;
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+ int v_active;
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+ int bpp;
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+ int refresh_rate;
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+};
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+
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+struct tmds_setting_information {
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+ int iga_path;
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+ int h_active;
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+ int v_active;
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+ int bpp;
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+ int refresh_rate;
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+ int get_dvi_size_method;
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+ int max_pixel_clock;
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+ int dvi_panel_size;
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+ int dvi_panel_hres;
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+ int dvi_panel_vres;
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+ int native_size;
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+};
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+
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+struct lvds_setting_information {
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+ int iga_path;
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+ int h_active;
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+ int v_active;
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+ int bpp;
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+ int refresh_rate;
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+ int get_lcd_size_method;
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+ int lcd_panel_id;
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+ int lcd_panel_size;
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+ int lcd_panel_hres;
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+ int lcd_panel_vres;
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+ int display_method;
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+ int device_lcd_dualedge;
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+ int LCDDithering;
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+ int lcd_mode;
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+ u32 vclk; /*panel mode clock value */
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+};
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+
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+struct GFX_DPA_SETTING {
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+ int ClkRangeIndex;
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+ u8 DVP0; /* CR96[3:0] */
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+ u8 DVP0DataDri_S1; /* SR2A[5] */
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+ u8 DVP0DataDri_S; /* SR1B[1] */
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+ u8 DVP0ClockDri_S1; /* SR2A[4] */
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+ u8 DVP0ClockDri_S; /* SR1E[2] */
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+ u8 DVP1; /* CR9B[3:0] */
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+ u8 DVP1Driving; /* SR65[3:0], Data and Clock driving */
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+ u8 DFPHigh; /* CR97[3:0] */
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+ u8 DFPLow; /* CR99[3:0] */
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+
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+};
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+
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+struct VT1636_DPA_SETTING {
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+ int PanelSizeID;
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+ u8 CLK_SEL_ST1;
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+ u8 CLK_SEL_ST2;
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+};
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+#endif /* __CHIP_H__ */
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Joseph Chan