|
@@ -100,21 +100,21 @@ void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc)
|
|
|
(void *pkt, void *arg_a), void *arg_a);
|
|
|
|
|
|
/*
|
|
|
- * DMA(Bug) on some chips seems to declare that the packet is ready, but the
|
|
|
- * packet length is not updated yet (by DMA) on the expected time.
|
|
|
+ * DMA(Bug) on bcm47xx chips seems to declare that the packet is ready, but
|
|
|
+ * the packet length is not updated yet (by DMA) on the expected time.
|
|
|
* Workaround is to hold processor till DMA updates the length, and stay off
|
|
|
* the bus to allow DMA update the length in buffer
|
|
|
*/
|
|
|
static inline void dma_spin_for_len(uint len, struct sk_buff *head)
|
|
|
{
|
|
|
-#if defined(__mips__)
|
|
|
+#if defined(CONFIG_BCM47XX)
|
|
|
if (!len) {
|
|
|
while (!(len = *(u16 *) KSEG1ADDR(head->data)))
|
|
|
udelay(1);
|
|
|
|
|
|
*(u16 *) (head->data) = cpu_to_le16((u16) len);
|
|
|
}
|
|
|
-#endif /* defined(__mips__) */
|
|
|
+#endif /* defined(CONFIG_BCM47XX) */
|
|
|
}
|
|
|
|
|
|
#endif /* _BRCM_DMA_H_ */
|