浏览代码

[IA64] Require SAL 3.2 in order to do extended config space ops

We had assumed that SAL firmware would return an error if it didn't
understand extended config space.  Unfortunately, the SAL on the SGI 750
doesn't do that, it panics the machine.  So, condition the extended PCI
config space accesses on SAL revision 3.2.

Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Tested-by: Brad Spengler <spender@grsecurity.net>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Matthew Wilcox 15 年之前
父节点
当前提交
adcd740341
共有 1 个文件被更改,包括 7 次插入2 次删除
  1. 7 2
      arch/ia64/pci/pci.c

+ 7 - 2
arch/ia64/pci/pci.c

@@ -56,10 +56,13 @@ int raw_pci_read(unsigned int seg, unsigned int bus, unsigned int devfn,
 	if ((seg | reg) <= 255) {
 	if ((seg | reg) <= 255) {
 		addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
 		addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
 		mode = 0;
 		mode = 0;
-	} else {
+	} else if (sal_revision >= SAL_VERSION_CODE(3,2)) {
 		addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
 		addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
 		mode = 1;
 		mode = 1;
+	} else {
+		return -EINVAL;
 	}
 	}
+
 	result = ia64_sal_pci_config_read(addr, mode, len, &data);
 	result = ia64_sal_pci_config_read(addr, mode, len, &data);
 	if (result != 0)
 	if (result != 0)
 		return -EINVAL;
 		return -EINVAL;
@@ -80,9 +83,11 @@ int raw_pci_write(unsigned int seg, unsigned int bus, unsigned int devfn,
 	if ((seg | reg) <= 255) {
 	if ((seg | reg) <= 255) {
 		addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
 		addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
 		mode = 0;
 		mode = 0;
-	} else {
+	} else if (sal_revision >= SAL_VERSION_CODE(3,2)) {
 		addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
 		addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
 		mode = 1;
 		mode = 1;
+	} else {
+		return -EINVAL;
 	}
 	}
 	result = ia64_sal_pci_config_write(addr, mode, len, value);
 	result = ia64_sal_pci_config_write(addr, mode, len, value);
 	if (result != 0)
 	if (result != 0)