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@@ -41,11 +41,35 @@
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#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
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#define AR71XX_RESET_SIZE 0x100
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+#define AR71XX_PCI_MEM_BASE 0x10000000
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+#define AR71XX_PCI_MEM_SIZE 0x07000000
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+
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+#define AR71XX_PCI_WIN0_OFFS 0x10000000
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+#define AR71XX_PCI_WIN1_OFFS 0x11000000
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+#define AR71XX_PCI_WIN2_OFFS 0x12000000
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+#define AR71XX_PCI_WIN3_OFFS 0x13000000
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+#define AR71XX_PCI_WIN4_OFFS 0x14000000
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+#define AR71XX_PCI_WIN5_OFFS 0x15000000
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+#define AR71XX_PCI_WIN6_OFFS 0x16000000
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+#define AR71XX_PCI_WIN7_OFFS 0x07000000
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+
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+#define AR71XX_PCI_CFG_BASE \
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+ (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
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+#define AR71XX_PCI_CFG_SIZE 0x100
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+
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#define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)
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#define AR7240_USB_CTRL_SIZE 0x100
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#define AR7240_OHCI_BASE 0x1b000000
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#define AR7240_OHCI_SIZE 0x1000
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+#define AR724X_PCI_MEM_BASE 0x10000000
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+#define AR724X_PCI_MEM_SIZE 0x04000000
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+
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+#define AR724X_PCI_CFG_BASE 0x14000000
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+#define AR724X_PCI_CFG_SIZE 0x1000
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+#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)
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+#define AR724X_PCI_CTRL_SIZE 0x100
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+
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#define AR724X_EHCI_BASE 0x1b000000
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#define AR724X_EHCI_SIZE 0x1000
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