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@@ -3035,11 +3035,20 @@ static void sky2_reset(struct sky2_hw *hw)
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u32 hwe_mask = Y2_HWE_ALL_MASK;
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u32 hwe_mask = Y2_HWE_ALL_MASK;
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/* disable ASF */
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/* disable ASF */
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- if (hw->chip_id == CHIP_ID_YUKON_EX) {
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+ if (hw->chip_id == CHIP_ID_YUKON_EX
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+ || hw->chip_id == CHIP_ID_YUKON_SUPR) {
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+ sky2_write32(hw, CPU_WDOG, 0);
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status = sky2_read16(hw, HCU_CCSR);
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status = sky2_read16(hw, HCU_CCSR);
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status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
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status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
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HCU_CCSR_UC_STATE_MSK);
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HCU_CCSR_UC_STATE_MSK);
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+ /*
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+ * CPU clock divider shouldn't be used because
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+ * - ASF firmware may malfunction
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+ * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks
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+ */
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+ status &= ~HCU_CCSR_CPU_CLK_DIVIDE_MSK;
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sky2_write16(hw, HCU_CCSR, status);
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sky2_write16(hw, HCU_CCSR, status);
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+ sky2_write32(hw, CPU_WDOG, 0);
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} else
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} else
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sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
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sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
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sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
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sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
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