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+Specifying interrupt information for devices
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+============================================
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+
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+1) Interrupt client nodes
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+-------------------------
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+
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+Nodes that describe devices which generate interrupts must contain an
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+"interrupts" property. This property must contain a list of interrupt
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+specifiers, one per output interrupt. The format of the interrupt specifier is
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+determined by the interrupt controller to which the interrupts are routed; see
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+section 2 below for details.
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+
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+The "interrupt-parent" property is used to specify the controller to which
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+interrupts are routed and contains a single phandle referring to the interrupt
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+controller node. This property is inherited, so it may be specified in an
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+interrupt client node or in any of its parent nodes.
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+
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+2) Interrupt controller nodes
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+-----------------------------
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+
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+A device is marked as an interrupt controller with the "interrupt-controller"
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+property. This is a empty, boolean property. An additional "#interrupt-cells"
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+property defines the number of cells needed to specify a single interrupt.
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+
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+It is the responsibility of the interrupt controller's binding to define the
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+length and format of the interrupt specifier. The following two variants are
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+commonly used:
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+
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+ a) one cell
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+ -----------
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+ The #interrupt-cells property is set to 1 and the single cell defines the
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+ index of the interrupt within the controller.
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+
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+ Example:
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+
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+ vic: intc@10140000 {
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+ compatible = "arm,versatile-vic";
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ reg = <0x10140000 0x1000>;
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+ };
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+
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+ sic: intc@10003000 {
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+ compatible = "arm,versatile-sic";
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ reg = <0x10003000 0x1000>;
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+ interrupt-parent = <&vic>;
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+ interrupts = <31>; /* Cascaded to vic */
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+ };
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+
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+ b) two cells
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+ ------------
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+ The #interrupt-cells property is set to 2 and the first cell defines the
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+ index of the interrupt within the controller, while the second cell is used
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+ to specify any of the following flags:
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+ - bits[3:0] trigger type and level flags
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+ 1 = low-to-high edge triggered
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+ 2 = high-to-low edge triggered
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+ 4 = active high level-sensitive
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+ 8 = active low level-sensitive
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+
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+ Example:
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+
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+ i2c@7000c000 {
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+ gpioext: gpio-adnp@41 {
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+ compatible = "ad,gpio-adnp";
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+ reg = <0x41>;
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+
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+ interrupt-parent = <&gpio>;
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+ interrupts = <160 1>;
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+
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+ gpio-controller;
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+ #gpio-cells = <1>;
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+
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+
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+ nr-gpios = <64>;
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+ };
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+
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+ sx8634@2b {
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+ compatible = "smtc,sx8634";
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+ reg = <0x2b>;
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+
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+ interrupt-parent = <&gpioext>;
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+ interrupts = <3 0x8>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ threshold = <0x40>;
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+ sensitivity = <7>;
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+ };
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+ };
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