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@@ -37,11 +37,11 @@ void fimc_hw_reset(struct fimc_dev *dev)
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writel(cfg, dev->regs + S5P_CIGCTRL);
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}
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-static u32 fimc_hw_get_in_flip(u32 ctx_flip)
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+static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx)
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{
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u32 flip = S5P_MSCTRL_FLIP_NORMAL;
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- switch (ctx_flip) {
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+ switch (ctx->flip) {
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case FLIP_X_AXIS:
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flip = S5P_MSCTRL_FLIP_X_MIRROR;
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break;
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@@ -51,16 +51,20 @@ static u32 fimc_hw_get_in_flip(u32 ctx_flip)
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case FLIP_XY_AXIS:
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flip = S5P_MSCTRL_FLIP_180;
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break;
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+ default:
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+ break;
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}
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+ if (ctx->rotation <= 90)
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+ return flip;
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- return flip;
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+ return (flip ^ S5P_MSCTRL_FLIP_180) & S5P_MSCTRL_FLIP_180;
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}
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-static u32 fimc_hw_get_target_flip(u32 ctx_flip)
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+static u32 fimc_hw_get_target_flip(struct fimc_ctx *ctx)
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{
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u32 flip = S5P_CITRGFMT_FLIP_NORMAL;
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- switch (ctx_flip) {
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+ switch (ctx->flip) {
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case FLIP_X_AXIS:
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flip = S5P_CITRGFMT_FLIP_X_MIRROR;
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break;
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@@ -70,11 +74,13 @@ static u32 fimc_hw_get_target_flip(u32 ctx_flip)
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case FLIP_XY_AXIS:
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flip = S5P_CITRGFMT_FLIP_180;
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break;
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- case FLIP_NONE:
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+ default:
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break;
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-
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}
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- return flip;
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+ if (ctx->rotation <= 90)
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+ return flip;
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+
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+ return (flip ^ S5P_CITRGFMT_FLIP_180) & S5P_CITRGFMT_FLIP_180;
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}
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void fimc_hw_set_rotation(struct fimc_ctx *ctx)
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@@ -84,10 +90,7 @@ void fimc_hw_set_rotation(struct fimc_ctx *ctx)
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cfg = readl(dev->regs + S5P_CITRGFMT);
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cfg &= ~(S5P_CITRGFMT_INROT90 | S5P_CITRGFMT_OUTROT90 |
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- S5P_CITRGFMT_FLIP_180);
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-
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- flip = readl(dev->regs + S5P_MSCTRL);
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- flip &= ~S5P_MSCTRL_FLIP_MASK;
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+ S5P_CITRGFMT_FLIP_180);
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/*
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* The input and output rotator cannot work simultaneously.
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@@ -95,26 +98,22 @@ void fimc_hw_set_rotation(struct fimc_ctx *ctx)
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* in direct fifo output mode.
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*/
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if (ctx->rotation == 90 || ctx->rotation == 270) {
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- if (ctx->out_path == FIMC_LCDFIFO) {
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- cfg |= S5P_CITRGFMT_INROT90;
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- if (ctx->rotation == 270)
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- flip |= S5P_MSCTRL_FLIP_180;
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- } else {
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- cfg |= S5P_CITRGFMT_OUTROT90;
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- if (ctx->rotation == 270)
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- cfg |= S5P_CITRGFMT_FLIP_180;
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- }
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- } else if (ctx->rotation == 180) {
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if (ctx->out_path == FIMC_LCDFIFO)
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- flip |= S5P_MSCTRL_FLIP_180;
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+ cfg |= S5P_CITRGFMT_INROT90;
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else
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- cfg |= S5P_CITRGFMT_FLIP_180;
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+ cfg |= S5P_CITRGFMT_OUTROT90;
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}
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- if (ctx->rotation == 180 || ctx->rotation == 270)
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- writel(flip, dev->regs + S5P_MSCTRL);
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- cfg |= fimc_hw_get_target_flip(ctx->flip);
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- writel(cfg, dev->regs + S5P_CITRGFMT);
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+ if (ctx->out_path == FIMC_DMA) {
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+ cfg |= fimc_hw_get_target_flip(ctx);
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+ writel(cfg, dev->regs + S5P_CITRGFMT);
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+ } else {
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+ /* LCD FIFO path */
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+ flip = readl(dev->regs + S5P_MSCTRL);
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+ flip &= ~S5P_MSCTRL_FLIP_MASK;
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+ flip |= fimc_hw_get_in_flip(ctx);
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+ writel(flip, dev->regs + S5P_MSCTRL);
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+ }
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}
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void fimc_hw_set_target_format(struct fimc_ctx *ctx)
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@@ -131,18 +130,13 @@ void fimc_hw_set_target_format(struct fimc_ctx *ctx)
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S5P_CITRGFMT_VSIZE_MASK);
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switch (frame->fmt->color) {
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- case S5P_FIMC_RGB565:
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- case S5P_FIMC_RGB666:
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- case S5P_FIMC_RGB888:
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+ case S5P_FIMC_RGB565...S5P_FIMC_RGB888:
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cfg |= S5P_CITRGFMT_RGB;
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break;
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case S5P_FIMC_YCBCR420:
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cfg |= S5P_CITRGFMT_YCBCR420;
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break;
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- case S5P_FIMC_YCBYCR422:
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- case S5P_FIMC_YCRYCB422:
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- case S5P_FIMC_CBYCRY422:
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- case S5P_FIMC_CRYCBY422:
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+ case S5P_FIMC_YCBYCR422...S5P_FIMC_CRYCBY422:
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if (frame->fmt->colplanes == 1)
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cfg |= S5P_CITRGFMT_YCBCR422_1P;
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else
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@@ -410,8 +404,7 @@ void fimc_hw_set_in_dma(struct fimc_ctx *ctx)
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/* Set the input DMA to process single frame only. */
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cfg = readl(dev->regs + S5P_MSCTRL);
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- cfg &= ~(S5P_MSCTRL_FLIP_MASK
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- | S5P_MSCTRL_INFORMAT_MASK
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+ cfg &= ~(S5P_MSCTRL_INFORMAT_MASK
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| S5P_MSCTRL_IN_BURST_COUNT_MASK
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| S5P_MSCTRL_INPUT_MASK
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| S5P_MSCTRL_C_INT_IN_MASK
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@@ -450,13 +443,6 @@ void fimc_hw_set_in_dma(struct fimc_ctx *ctx)
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break;
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}
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- /*
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- * Input DMA flip mode (and rotation).
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- * Do not allow simultaneous rotation and flipping.
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- */
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- if (!ctx->rotation && ctx->out_path == FIMC_LCDFIFO)
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- cfg |= fimc_hw_get_in_flip(ctx->flip);
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-
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writel(cfg, dev->regs + S5P_MSCTRL);
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/* Input/output DMA linear/tiled mode. */
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