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@@ -22,41 +22,59 @@
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#include "r8192E_phy.h"
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#include "r8190P_rtl8256.h"
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-void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandwidth)
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+void PHY_SetRF8256Bandwidth(struct net_device *dev,
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+ enum ht_channel_width Bandwidth)
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{
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u8 eRFPath;
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struct r8192_priv *priv = rtllib_priv(dev);
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- for (eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) {
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+ for (eRFPath = 0; eRFPath < priv->NumTotalRFPath; eRFPath++) {
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if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
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continue;
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switch (Bandwidth) {
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case HT_CHANNEL_WIDTH_20:
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- if (priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE) {
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- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x100);
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- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3d7);
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- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x021);
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+ if (priv->card_8192_version == VERSION_8190_BD ||
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+ priv->card_8192_version == VERSION_8190_BE) {
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+ rtl8192_phy_SetRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ 0x0b, bMask12Bits, 0x100);
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+ rtl8192_phy_SetRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ 0x2c, bMask12Bits, 0x3d7);
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+ rtl8192_phy_SetRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ 0x0e, bMask12Bits, 0x021);
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} else {
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- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
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+ RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
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+ "unknown hardware version\n");
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}
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break;
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case HT_CHANNEL_WIDTH_20_40:
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- if (priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE) {
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- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x300);
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- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3ff);
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- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x0e1);
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+ if (priv->card_8192_version == VERSION_8190_BD ||
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+ priv->card_8192_version == VERSION_8190_BE) {
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+ rtl8192_phy_SetRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ 0x0b, bMask12Bits, 0x300);
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+ rtl8192_phy_SetRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ 0x2c, bMask12Bits, 0x3ff);
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+ rtl8192_phy_SetRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ 0x0e, bMask12Bits, 0x0e1);
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} else {
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- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
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+ RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
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+ "unknown hardware version\n");
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}
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break;
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default:
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- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
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+ RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown "
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+ "Bandwidth: %#X\n", Bandwidth);
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break;
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}
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@@ -64,7 +82,7 @@ void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandw
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return;
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}
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-bool PHY_RF8256_Config(struct net_device* dev)
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+bool PHY_RF8256_Config(struct net_device *dev)
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{
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struct r8192_priv *priv = rtllib_priv(dev);
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bool rtStatus = true;
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@@ -74,7 +92,7 @@ bool PHY_RF8256_Config(struct net_device* dev)
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return rtStatus;
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}
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-bool phy_RF8256_Config_ParaFile(struct net_device* dev)
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+bool phy_RF8256_Config_ParaFile(struct net_device *dev)
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{
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u32 u4RegValue = 0;
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u8 eRFPath;
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@@ -87,7 +105,8 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
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u8 ConstRetryTimes = 5, RetryTimes = 5;
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u8 ret = 0;
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- for (eRFPath = (enum rf90_radio_path)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) {
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+ for (eRFPath = (enum rf90_radio_path)RF90_PATH_A;
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+ eRFPath < priv->NumTotalRFPath; eRFPath++) {
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if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
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continue;
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@@ -97,11 +116,13 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
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switch (eRFPath) {
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case RF90_PATH_A:
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case RF90_PATH_C:
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- u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
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+ u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs,
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+ bRFSI_RFENV);
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break;
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- case RF90_PATH_B :
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+ case RF90_PATH_B:
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case RF90_PATH_D:
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- u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
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+ u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs,
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+ bRFSI_RFENV<<16);
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break;
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}
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@@ -109,14 +130,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
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rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
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- rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);
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- rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);
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+ rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,
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+ b3WireAddressLength, 0x0);
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+ rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,
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+ b3WireDataLength, 0x0);
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- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path) eRFPath, 0x0, bMask12Bits, 0xbf);
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+ rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path) eRFPath, 0x0,
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+ bMask12Bits, 0xbf);
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- rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (enum rf90_radio_path)eRFPath);
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- if (rtStatus!= true) {
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- RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath);
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+ rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF,
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+ (enum rf90_radio_path)eRFPath);
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+ if (rtStatus != true) {
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+ RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check "
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+ "Radio[%d] Fail!!\n", eRFPath);
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goto phy_RF8256_Config_ParaFile_Fail;
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}
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@@ -124,34 +150,61 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
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RF3_Final_Value = 0;
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switch (eRFPath) {
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case RF90_PATH_A:
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- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
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- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
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- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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+ while (RF3_Final_Value != RegValueToBeCheck &&
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+ RetryTimes != 0) {
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+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
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+ (enum rf90_radio_path)eRFPath);
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+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ RegOffSetToBeCheck,
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+ bMask12Bits);
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+ RT_TRACE(COMP_RF, "RF %d %d register final "
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+ "value: %x\n", eRFPath,
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+ RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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case RF90_PATH_B:
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- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
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- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
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- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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+ while (RF3_Final_Value != RegValueToBeCheck &&
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+ RetryTimes != 0) {
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+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
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+ (enum rf90_radio_path)eRFPath);
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+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ RegOffSetToBeCheck,
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+ bMask12Bits);
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+ RT_TRACE(COMP_RF, "RF %d %d register final "
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+ "value: %x\n", eRFPath,
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+ RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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case RF90_PATH_C:
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- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
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- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
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- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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+ while (RF3_Final_Value != RegValueToBeCheck &&
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+ RetryTimes != 0) {
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+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
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+ (enum rf90_radio_path)eRFPath);
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+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ RegOffSetToBeCheck,
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+ bMask12Bits);
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+ RT_TRACE(COMP_RF, "RF %d %d register final "
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+ "value: %x\n", eRFPath,
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+ RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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case RF90_PATH_D:
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- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
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- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
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- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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+ while (RF3_Final_Value != RegValueToBeCheck &&
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+ RetryTimes != 0) {
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+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
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+ (enum rf90_radio_path)eRFPath);
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+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
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+ (enum rf90_radio_path)eRFPath,
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+ RegOffSetToBeCheck, bMask12Bits);
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+ RT_TRACE(COMP_RF, "RF %d %d register final "
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+ "value: %x\n", eRFPath,
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+ RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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@@ -160,16 +213,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
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switch (eRFPath) {
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case RF90_PATH_A:
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case RF90_PATH_C:
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- rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
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+ rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV,
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+ u4RegValue);
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break;
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- case RF90_PATH_B :
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+ case RF90_PATH_B:
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case RF90_PATH_D:
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- rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
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+ rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16,
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+ u4RegValue);
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break;
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}
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if (ret) {
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- RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
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+ RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():"
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+ "Radio[%d] Fail!!", eRFPath);
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goto phy_RF8256_Config_ParaFile_Fail;
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}
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@@ -183,18 +239,17 @@ phy_RF8256_Config_ParaFile_Fail:
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return false;
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}
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-void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel)
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+void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel)
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{
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- u32 TxAGC=0;
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+ u32 TxAGC = 0;
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struct r8192_priv *priv = rtllib_priv(dev);
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TxAGC = powerlevel;
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- if (priv->bDynamicTxLowPower == true)
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- {
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+ if (priv->bDynamicTxLowPower == true) {
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if (priv->CustomerID == RT_CID_819x_Netcore)
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- TxAGC = 0x22;
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- else
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- TxAGC += priv->CckPwEnl;
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+ TxAGC = 0x22;
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+ else
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+ TxAGC += priv->CckPwEnl;
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}
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if (TxAGC > 0x24)
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TxAGC = 0x24;
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@@ -202,7 +257,7 @@ void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel)
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}
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-void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
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+void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel)
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{
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struct r8192_priv *priv = rtllib_priv(dev);
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u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
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@@ -211,13 +266,15 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
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u8 byte0, byte1, byte2, byte3;
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powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff;
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- powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
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+ powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
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+ (powerBase0 << 8) | powerBase0;
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powerBase1 = powerlevel;
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- powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
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+ powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) |
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+ (powerBase1 << 8) | powerBase1;
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- for (index=0; index<6; index++)
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- {
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- writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1));
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+ for (index = 0; index < 6; index++) {
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+ writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] +
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+ ((index < 2) ? powerBase0 : powerBase1));
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byte0 = (u8)(writeVal & 0x7f);
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byte1 = (u8)((writeVal & 0x7f00)>>8);
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byte2 = (u8)((writeVal & 0x7f0000)>>16);
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@@ -231,20 +288,17 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
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if (byte3 > 0x24)
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byte3 = 0x24;
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- if (index == 3)
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- {
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- writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
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+ if (index == 3) {
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+ writeVal_tmp = (byte3 << 24) | (byte2 << 16) |
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+ (byte1 << 8) | byte0;
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priv->Pwr_Track = writeVal_tmp;
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}
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if (priv->bDynamicTxHighPower == true)
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- {
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writeVal = 0x03030303;
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- }
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else
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- {
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- writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
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- }
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+ writeVal = (byte3 << 24) | (byte2 << 16) |
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+ (byte1 << 8) | byte0;
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rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
|
|
|
}
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|
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|