|
@@ -198,20 +198,6 @@ struct cpu_spec cpu_specs[] = {
|
|
|
.num_pmcs = 4,
|
|
|
.cpu_setup = __setup_cpu_750
|
|
|
},
|
|
|
- { /* 745/755 */
|
|
|
- .pvr_mask = 0xfffff000,
|
|
|
- .pvr_value = 0x00083000,
|
|
|
- .cpu_name = "745/755",
|
|
|
- .cpu_features = CPU_FTR_COMMON |
|
|
|
- CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
|
|
|
- CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
|
|
|
- CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
|
|
|
- .cpu_user_features = COMMON_PPC,
|
|
|
- .icache_bsize = 32,
|
|
|
- .dcache_bsize = 32,
|
|
|
- .num_pmcs = 4,
|
|
|
- .cpu_setup = __setup_cpu_750
|
|
|
- },
|
|
|
{ /* 750CX (80100 and 8010x?) */
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
.pvr_value = 0x00080100,
|
|
@@ -254,6 +240,20 @@ struct cpu_spec cpu_specs[] = {
|
|
|
.num_pmcs = 4,
|
|
|
.cpu_setup = __setup_cpu_750cx
|
|
|
},
|
|
|
+ { /* 745/755 */
|
|
|
+ .pvr_mask = 0xfffff000,
|
|
|
+ .pvr_value = 0x00083000,
|
|
|
+ .cpu_name = "745/755",
|
|
|
+ .cpu_features = CPU_FTR_COMMON |
|
|
|
+ CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
|
|
|
+ CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
|
|
|
+ CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
|
|
|
+ .cpu_user_features = COMMON_PPC,
|
|
|
+ .icache_bsize = 32,
|
|
|
+ .dcache_bsize = 32,
|
|
|
+ .num_pmcs = 4,
|
|
|
+ .cpu_setup = __setup_cpu_750
|
|
|
+ },
|
|
|
{ /* 750FX rev 1.x */
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
.pvr_value = 0x70000100,
|